Stability in thyristor-based memory device
View Patent ↗A semiconductor device having a thyristor-based memory device exhibits improved stability under adverse operating conditions related to temperature, noise, electrical disturbances and light. In one particular example embodiment of the present invention, a semiconductor device includes a thyristor-based memory device that uses a shunt that effects a leakage current in the thyristor. The thyristor includes a capacitively-coupled control port and anode and cathode end portions. Each of the end portions has an emitter region and an adjacent base region. In one implementation, the current shunt is located between the emitter and base region of one of the end portions of the thyristor and is configured and arranged to shunt low-level current therebetween. In connection with an example embodiment, it has been discovered that shunting current in this manner improves the ability of the device to operate under adverse conditions that would, absent the shunt, result in inadvertent turn on, while keeping the standby current of the memory device to an acceptably low level.
1. A semiconductor device adapted for stabilizing data storage for a data-storage memory circuit, the semiconductor device comprising:
a thyristor device having a capacitively-coupled control port and anode and cathode end portions, each end portion including an emitter and a base region, the capacitively-coupled control port controlled to switch the thyristor device between a current passing mode and a current blocking mode; and
means for shunting low-level current at a first base region of a first one of the end portions.
2. A semiconductor device adapted for stabilizing data storage for a data-storage memory circuit, the semiconductor device comprising:
a thyristor device having a capacitively-coupled control port and anode and cathode end portions, each end portion including an emitter and a base region, the capacitively coupled control port controlled to switch the thyristor device between a current passing mode and a current blocking mode; and
a low-level current shunt adapted to shunt current at a first base region of a first one of the end portions.
3. The semiconductor device of claim 2 , wherein the low-level current shunt includes a transistor having source and drain regions, one of the source and drain regions being electrically coupled to the emitter region of an end portion of the thyristor device and the other of the source and drain regions being electrically coupled to tho base region of the same end portion of the thyristor device, the transistor further having a gate adapted to control the current flow between the source and drain regions.
4. The semiconductor device of claim 3 , wherein the gate is electrically coupled to a base region of another end portion of the thyristor device.