IP Library Granted Patent US 7,107,388
Granted Patent B2
US 7,107,388 · App. 10/424,084 · Granted Sep 12, 2006

Method for read once memory

Assignee: Intel Corporation
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Quick Facts
Patent No.
US 7,107,388
App. No.
10/424,084
Granted
Sep 12, 2006
Kind
B2
Abstract

Flash memory in a computing system having blocks that may be read only once per machine reset may be implemented by mapping the flash memory to an address space of the computing system, copying a selected block of at least one of instructions and data from a first region in the flash memory to a second region in a memory of the computing system, at least one of executing the instructions and accessing the data from the second region, unmapping the selected block of flash memory, and overwriting the second region. Subsequent attempts to access the selected block without performing a machine reset will fail. The selected blocks may be used to store secret instructions and/or data.

Claims (28)

1. A method of managing read once flash memory in a computing system comprising:

mapping the flash memory to an address space of the computing system;

copying a selected block of at least one of instructions and data from a first region in the flash memory to a second region in a memory of the computing system;

at least one of executing the instructions and accessing the data from the second region;

unmapping only the selected block of flash memory; and

overwriting the second region wherein unmapping the selected block comprises locking the selected block in the flash memory based on the executed instructions such that the selected block is virtually hardware locked.

2. The method of claim 1 , wherein unmapping the selected block of flash memory prevents subsequent accesses of the selected block until a machine reset of the computing system is performed.

3. The method of claim 1 , wherein the at least one of executing the instructions and accessing the data comprises performing cryptographic operations by the computing system.

4. The method of claim 1 , wherein the locking of the selected block in the flash memory includes locking the selected block using a programmable technique.

5. The method of claim 4 , wherein the locking of the selected block in the flash memory comprises programming a read lock bit, a write lock bit, and a lock down bit corresponding to the selected block.

6. The method of claim 1 , further comprising performing a machine reset of the computing system prior to mapping the flash memory.

7. A computing system comprising:

a flash memory having a selected block to store at least one of instructions and data, the selected block being capable of being virtually hardware locked; and

a processor to execute code to map the flash memory to an address space of the computing system, to copy the selected block from a first region in the flash memory to a second region in a memory of the computing system, to at least one of execute the instructions and access the data from the second region, to unmap only the selected block of flash memory, and to overwrite the second region wherein the processor executes code to unmap the selected block by locking the selected block in the flash memory based on the executed instructions such that the selected block is virtually hardware locked.

8. The computing system of claim 7 , wherein the processor executes code to unmap the selected block of flash memory thereby preventing subsequent accesses of the selected block until a machine reset of the computing system is performed.

9. The computing system of claim 7 , wherein the processor at least one of executes the instructions and accesses the data to perform cryptographic operations for the computing system.

10. The computing system of claim 7 , wherein the locking of the selected block in the flash memory includes locking the selected block using a programmable technique.

11. The computing system of claim 8 , wherein the locking of the selected block in the flash memory comprises programming a read lock bit, a write lock bit, and a lock down bit corresponding to the selected block.

12. The computing system of claim 7 , wherein the computing system performs a machine reset prior to the processor executing code to map the flash memory.

13. A computer-readable medium providing instructions, which if executed by a processor of a computing system, causes the processor to perform operations comprising:

mapping a flash memory to an address space of the computing system;

copying a selected block of at least one of instructions and data from a first region in the flash memory to a second region in a memory of the computing system;

at least one of executing the instructions and accessing the data from the second region;

unmapping only the selected block of flash memory; and overwriting the second region wherein operations for unmapping the selected block comprises operations for locking the selected block in the flash memory based on the executed instructions such that the selected block is virtually hardware locked.

14. The article of claim 13 , wherein operations for unmapping the selected block of flash memory prevents subsequent accesses of the selected block until a machine reset of the computing system is performed.

15. The article of claim 13 , wherein the at least one of executing the instructions and accessing the data comprises performing cryptographic operations by the computing system.

16. The article of claim 13 , wherein operations for the locking of the selected block in the flash memory include operations for locking the selected block using a programmable technique.

17. The article of claim 16 , wherein operations for the locking of the selected block in the flash memory comprises programming a read lock bit, a write lock bit, and a lock down bit corresponding to the selected block.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 14, 2014
From: INTEL CORPORATION
To: SONY CORPORATION OF AMERICA
Reel/Frame 032893/0199 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 25, 2003
From: ZIMMER, VINCENT J.; ROTHMAN, MICHAEL A.
To: INTEL CORPORATION
Reel/Frame 014016/0256 →
Continuity (1)
Related Publication 20040215908A1 · Oct 28, 2004