Non-volatile semiconductor memory device and method of fabricating thereof
View Patent ↗A phosphorus-doped amorphous silicon film and a silicon nitride film are serially grown over a semiconductor substrate. The obtained stack is patterned so as to obtain word lines. A CVD oxide film is grown on the entire surface and then anisotropically etched to thereby form sidewalls on the lateral faces of the word lines. An ONO film previously formed just under the CVD oxide film is also removed by the etching. The semiconductor substrate is etched to thereby form a groove, where masking is effected by the silicon nitride film, silicon oxide film and sidewall. Boron ions are doped by ion implantation through the same mask into the bottom of the groove to thereby form a channel stop impurity-diffused layer. Then, an inter-layer insulating film is formed over the entire surface.
1. A non-volatile semiconductor memory device comprising:
a semiconductor substrate;
a plurality of bit lines comprised of an impurity-diffused layer formed in the surficial portion of said semiconductor substrate; and
a plurality of word lines comprised of a conductive layer formed above said semiconductor substrate and arranged so as to cross with said plurality of bit lines in a plan view;
a first insulating film formed on said word lines; and
a sidewall formed along said word lines;
wherein between every adjacent word lines,
a groove is formed only in the surficial portion of said semiconductor substrate within each area horizontally defined, in a plan view, by the first insulating film formed on said adjacent word lines and by adjacent bit lines so as to be effectively aligned with an edge of said sidewall, said groove not overlapping said first insulating film in plan view;
a channel stop impurity-diffused layer is formed at the bottom of said groove; and
an insulating film is filled in said groove.
2. The non-volatile semiconductor memory device according to claim 1 , wherein
said device is a NOR-type flash memory; and
channel stop impurity-diffused layer is formed also on the lateral faces of said groove.
3. The non-volatile semiconductor memory device according to claim 1 , wherein said device is a NOR-type flash memory.
4. The non-volatile semiconductor memory device according to claim 1 , wherein said device is an AND-type flash memory.
5. A non-volatile semiconductor memory device comprising:
a semiconductor substrate;
a plurality of bit lines comprised of an impurity-diffused layer formed in the surficial portion of said semiconductor substrate; and
a plurality of word lines comprised of a conductive layer formed above said semiconductor substrate and arranged so as to cross with said plurality of bit lines in a plan view;
wherein between every adjacent word lines,
a groove is formed only in the surficial portion of said semiconductor substrate within each area horizontally defined, in a plan view, by said adjacent word lines and adjacent bit lines, said groove not overlapping said word lines or bit lines in the plan view;
a channel stop impurity-diffused layer is formed at the bottom of said groove;
sidewalls are formed on the lateral faces of the individual word lines so as to extend towards the bottom of said groove; and
an insulating film is filled in said groove.
6. The non-volatile semiconductor memory device according to claim 5 , wherein said groove is formed, in a plan view, so as to be aligned with said word lines.
7. The non-volatile semiconductor memory device according to claim 5 , wherein said groove is formed, in a plan view, so as to be distant from said word lines.
8. The non-volatile semiconductor memory device according to claim 5 , further comprising a silicide film formed on said bit lines and on a portion of said channel stop impurity-diffused layer exposed out from said sidewalls.
9. The non-volatile semiconductor memory device according to claim 5 , wherein
said device is a NOR-type flash memory; and
channel stop impurity-diffused layer is formed also on the lateral faces of said groove.
10. The non-volatile semiconductor memory device according to claim 5 , wherein said device is a NOR-type flash memory.
11. The non-volatile semiconductor memory device according to claims 5 , wherein said device is an AND-type flash memory.