Magnetic shielding for reducing magnetic interference
View Patent ↗A magnetic memory array comprises a plurality of magnetic memory cells, a magnetic shielding disposed adjacent to at least one of the magnetic memory cells to reduce magnetic interference with respect to another of the magnetic memory cells, and an insulator disposed as to separate at least a portion of the magnetic shielding from the at least one magnetic memory cell. The magnetic shielding may be a magnetic shield layer, patterned magnetic shield materials, and/or magnetic particles embedded in the insulator.
1. A magnetic shield for reducing magnetic interference between at least two magnetic memory cells in a magnetic memory array, said memory array comprising a plurality of magnetic memory cells, each of said magnetic memory cells including a data layer and a reference layer, wherein a value stored in said data layer is determinable by measuring a relative orientation of the magnetic moments of said data layer and said reference layer, at least one of said magnetic memory cells during operation emanating fringe magnetic fields potentially influencing a nearly magnetic memory cell, said magnetic shield being made by a process comprising:
(a) forming a magnetic shielding adjacent to at least one of said magnetic memory cells to reduce magnetic interference emanating from said at least one of said magnetic memory cells with respect to another of said magnetic memory cells; and
(b) forming an insulator separating at least a portion of said magnetic shielding from said at least one magnetic memory cell.
2. A magnetic shield for reducing magnetic interference between at least two magnetic memory cells in a magnetic memory array, said magnetic shield being made by a process comprising:
(a) forming a magnetic shield layer:
(1) in a different plane than a bit plane of said memory array; and
(2) being disposed adjacent to at least one of said magnetic memory cells to reduce magnetic interference emanating from said at least one of said magnetic memory cells with respect to another of said magnetic memory cells; and
(b) forming an insulator disposed as to separate at least a portion of said magnetic shield layer from said at least one magnetic memory cell.
3. A magnetic shield for reducing magnetic interference between at least two magnetic memory cells in a magnetic memory array, said magnetic shield being made by a process comprising:
(a) forming patterned magnetic shield materials adjacent to at least one of said magnetic memory cells to reduce magnetic interference with respect to another of said magnetic memory cells; and
(b) forming an insulator separating at least a portion of said patterned magnetic shield materials from said at least one magnetic memory cell.
4. A magnetic shield for reducing magnetic interference between at least two magnetic memory cells in a magnetic memory array, the magnetic shield being made by a method comprising:
(a) forming a plurality of magnetic particles adjacent to at least one of said magnetic memory cells to reduce magnetic interference with respect to another of said magnetic memory cells; and
(b) forming an insulator disposed as to separate at least a portion of said plurality of magnetic shield particles from said at least one magnetic memory cell:
(1) said insulator including an insulating oxide between said magnetic memory cells; and
(2) said magnetic particles being embedded within said insulating oxide.