Quadrature correction method for analog television reception using direct-conversion tuners
View Patent ↗A direct conversion radio frequency (RF) tuner includes a mixer generating I and Q quadrature components. A phase detection circuit generates a phase error measurement between the I quadrature component and the Q quadrature component. A phase correction circuit corrects a phase of the Q component based on the phase error measurement, and outputs a phase-corrected Q quadrature component. An I quadrature component gain control circuit receives the I quadrature component and outputting an amplitude corrected I quadrature component. A Q quadrature component gain control circuit receives the phase corrected Q quadrature component and outputs an amplitude corrected Q quadrature component.
1. A direct conversion radio frequency (RE) tuner for processing an input signal, comprising:
a mixer generating I and Q quadrature components;
a phase correction circuit generating a phase error measurement between the I quadrature component and the Q quadrature component, correcting a phase of the Q component based on the phase error measurement, and outputting a phase-corrected Q quadrature component;
an I quadrature component gain control circuit receiving the I quadrature component and outputting an amplitude corrected I quadrature component; and
a Q quadrature component gain control circuit receiving the phase corrected Q quadrature component and outputting an amplitude corrected Q quadrature component;
wherein respective gains of the I quadrature component gain control circuit and the Q quadrature gain control circuit are determined when the input signal includes one of a horizontal sync signal or vertical sync signal.
2. The tuner of claim 1 , wherein the phase correction circuit includes:
a first hard limiter receiving the Q quadrature component and outputting a first modified Q quadrature component;
a second hard limiter receiving the I quadrature component and outputting a first modified I quadrature component;
a phase detection circuit receiving the first modified Q quadrature component and the first modified I quadrature component and outputting an error signal;
a first loop filter filtering the error signal;
a circuit generating a product of the error signal and the I quadrature component; and
a summer receiving the Q quadrature component and the product of the error signal and the I quadrature component and outputting the phase corrected Q quadrature component.
3. The tuner of claim 1 , wherein the Q quadrature component gain control circuit includes a variable gain amplifier, and a power detection circuit and a loop filter connected to the variable gain amplifier in a feedback loop.
4. The tuner of claim 1 , wherein the I quadrature component gain control circuit includes a variable gain amplifier, and a power detection circuit and a loop filter connected to the variable gain amplifier in a feedback loop.
5. The tuner of claim 1 , wherein the I quadrature component gain control circuit outputs the amplitude corrected I quadrature component corrected relative to the phase corrected Q quadrature component.
6. The tuner of claim 1 , wherein the I quadrature component gain control circuit outputs the amplitude corrected I quadrature component corrected relative to a reference voltage; and
wherein the Q quadrature component gain control circuit outputs the amplitude corrected Q quadrature component corrected relative to the reference voltage.
7. The tuner of claim 1 , wherein the I quadrature component gain control circuit outputs the amplitude corrected I quadrature component that is corrected relative to the Q quadrature component.
8. A direct conversion radio frequency (RF) tuner for processing an input signal, comprising:
a mixer generating I and Q quadrature components;
a phase correction circuit generating a phase error measurement between the Q quadrature component and the I quadrature component, correcting a phase of the I component based on the phase error measurement, and outputting a phase-corrected I quadrature component;
a Q quadrature component gain control circuit receiving the Q quadrature component and outputting an amplitude corrected Q quadrature component; and
an I quadrature component gain control circuit receiving the phase corrected I quadrature component and outputting an amplitude corrected I quadrature component;
wherein respective gains of the I quadrature component gain control circuit and the Q quadrature gain control circuit are determined when the input signal includes one of a horizontal sync signal or vertical sync signal.
9. The tuner of claim 8 , wherein the phase correction circuit includes:
a first hard limiter receiving the I quadrature component and outputting a first modified I quadrature component;
a second hard limiter receiving the Q quadrature component and outputting a first modified Q quadrature component;
a phase detection circuit receiving the first modified I quadrature component and the first modified Q quadrature component and outputting an error signal;
a first loop filter filtering the error signal;
a circuit generating a product of the error signal and the Q quadrature component; and
a summer receiving the I quadrature component and the product of the error signal and the Q quadrature component and outputting the phase corrected I quadrature component.
10. The tuner of claim 8 , wherein the I quadrature component gain control circuit includes a variable gain amplifier, and a power detection circuit and a loop filter connected to the variable gain amplifier in a feedback loop.
11. The tuner of claim 8 , wherein the Q quadrature component gain control circuit includes a variable gain amplifier, and a power detection circuit and a loop filter connected to the variable gain amplifier in a feedback loop.
12. The tuner of claim 8 , wherein the Q quadrature component gain control circuit outputs the amplitude corrected Q quadrature component corrected relative to the phase corrected I quadrature component.
13. The tuner of claim 8 , wherein the Q quadrature component gain control circuit outputs the amplitude corrected Q quadrature component corrected relative to a reference voltage; and
wherein the I quadrature component gain control circuit outputs the amplitude corrected I quadrature component corrected relative to the reference voltage.
14. The tuner of claim 8 , wherein the Q quadrature component gain control circuit outputs the amplitude corrected Q quadrature component that is corrected relative to the I quadrature component.
15. A method of balancing I and Q quadrature components, comprising:
during a horizontal sync signal, adjusting an amplitude of the I quadrature component to a predetermined level using an automatic gain control circuit to generate a normalized I quadrature component;
during the horizontal sync signal, generating a phase error of the normalized I quadrature component and the Q quadrature component;
subtracting a product of the phase error and the I quadrature component from the Q quadrature component; and
during the horizontal sync signal, adjusting an amplitude of the Q quadrature component to an amplitude of the normalized I quadrature component.
16. A method of balancing I and Q quadrature components, comprising:
during a vertical sync signal, adjusting an amplitude of the I quadrature component to a predetermined level using an automatic gain control circuit to generate a normalized I quadrature component;
during the vertical sync signal, generating a phase error of the normalized I quadrature component and the Q quadrature component;
subtracting a product of the phase error and the I quadrature component from the Q quadrature component; and
during the vertical sync signal, adjusting an amplitude of the Q quadrature component to an amplitude of the normalized I quadrature component.
17. A direct conversion radio frequency (RF) tuner for processing an input signal, comprising:
a mixer generating I and Q quadrature components;
a phase correction circuit generating a phase error measurement between the I quadrature component and the Q quadrature component, correcting a phase of the Q component based on the phase error measurement, and outputting a phase-corrected Q quadrature component;
an I quadrature component gain control circuit receiving the I quadrature component and outputting an amplitude corrected I quadrature component; and
a Q quadrature component gain control circuit receiving the phase corrected Q quadrature component and outputting an amplitude corrected Q quadrature component;
wherein the phase correction circuit includes,
a first hard limiter receiving the Q quadrature component and outputting a first modified Q quadrature component;
a second hard limiter receiving the I quadrature component and outputting a first modified I quadrature component;
a phase detection circuit receiving the first modified Q quadrature component and the first modified I quadrature component and outputting an error signal;
a first loop filter filtering the error signal;
a circuit generating a product of the error signal and the I quadrature component; and
a summer receiving the Q quadrature component and the product of the error signal and the I quadrature component and outputting the phase corrected Q quadrature component.
18. A direct conversion radio frequency (RF) tuner for processing an input signal, comprising:
a mixer generating I and Q quadrature components;
a phase correction circuit generating a phase error measurement between the Q quadrature component and the I quadrature component, correcting a phase of the I component based on the phase error measurement, and outputting a phase-corrected I quadrature component;
a Q quadrature component gain control circuit receiving the Q quadrature component and outputting an amplitude corrected Q quadrature component;
an I quadrature component gain control circuit receiving the phase corrected I quadrature component and outputting an amplitude corrected I quadrature component;
wherein the phase correction circuit includes,
a first hard limiter receiving the I quadrature component and outputting a first modified I quadrature component;
a second hard limiter receiving the Q quadrature component and outputting a first modified Q quadrature component;
a phase detection circuit receiving the first modified I quadrature component and the first modified Q quadrature component and outputting an error signal;
a first loop filter filtering the error signal;
a circuit generating a product of the error signal and the Q quadrature component; and
a summer receiving the I quadrature component and the product of the error signal and the Q quadrature component and outputting the phase corrected I quadrature component.