Packet processing system

1. A method comprising:

invoking a plurality of threads of execution, each of the threads of execution:

receiving a start signal from a previous thread;

receiving a data packet from a buffer;

issuing a command to store the data packet in a memory;

receiving a continue signal from the previous thread;

transmitting a continue signal to a next thread after the data packet is stored in the memory;

disposing of the data packet;

receiving an indication that the buffer has received a new packet;

receiving a start signal from the previous thread; and

transmitting a start signal to a next thread.

2. A method according to claim 1 , further comprising:

entering a sleep state after issuing the command; and

waking from the sleep state after the data packet is stored in the memory, wherein another one of the plurality of threads is active during the sleep state.

3. A method according to claim 1 , further comprising:

releasing the buffer;

entering a sleep state after releasing the buffer; and waking from the sleep state in response to the indication.

4. A method according to claim 1 , wherein disposing of the packet comprises:

forwarding the data packet to a next processing block if the data packet is not received in error; and

discarding the data packet if the data packet is received in error.

5. A method according to claim 1 , further comprising:

receiving an initialization start signal.

6. A method according to claim 1 , further comprising:

determining a state based on the received data packet; and

executing a process based on the determined state.

7. A method according to claim 6 , further comprising:

accessing a jump table to determine the process based on the determined state.

8. A method according to claim 7 , wherein the jump table comprises associations between states and pointers to executable code.

9. A method according to claim 1 , wherein the previous thread is one of the plurality of threads of execution.

10. method according to claim 1 , wherein the next thread is one of the plurality of threads of execution.

11. A method according to claim 1 , wherein the previous thread is one of the plurality of threads of execution, and wherein the next thread is one of the plurality of threads of execution.

12. An apparatus comprising:

memory storing program code, the program code executable to:

invoke a plurality of threads of execution, each of the threads of execution to:

receive a start signal from a previous thread;

receive a data packet from a buffer;

issue a command to store the data packet in a memory;

receive a continue signal from the previous thread;

transmit a continue signal to a next thread after the data packet is stored in the memory;

dispose of the data packet;

receive an indication that the buffer has received a new packet;

receive a start signal from the previous thread; and

transmit a start signal to a next thread.

13. An apparatus according to claim 12 , the program code further executable to:

entering a sleep state after issuing the command; and

waking from the sleep state after the data packet is stored in the memory,

wherein another one of the plurality of threads is active during the sleep state.

14. An apparatus according to claim 12 , the program code further executable to:

release the buffer;

enter a sleep state after releasing the buffer; and

wake from the sleep state in response to the indication.

15. An apparatus according to claim 12 , wherein the program code executable to dispose of the packet comprises program code executable to:

forward the data packet to a next processing block if the data packet is not received in error; and

discard the data packet if the data packet is received in error.

16. An apparatus according to claim 12 , the program code further executable to:

receive an initialization start signal.

17. An apparatus according to claim 12 , the program code further executable to:

determine a state based on the received data packet; and

execute a process based on the determined state.

18. An apparatus according to claim 17 , the program code further executable to:

access a jump table to determine the process based on the determined state.

19. An apparatus according to claim 18 , wherein the jump table comprises associations between states and pointers to executable code.

20. An apparatus comprising:

a processor;

a Double Data Rate random access memory coupled to the processor; and

a control store associated with the processor, the control store storing program code executable by the processor to:

invoke a plurality of threads of execution, each of the threads of execution to:

receive a start signal from a previous thread;

receive a data packet from a buffer;

issue a command to store the data packet in the random access memory;

receive a continue signal from the previous thread;

transmit a continue signal to a next thread after the data packet is stored in the random access memory;

dispose of the data packet;

receive an indication that the buffer has received a new packet;

receive a start signal from the previous thread; and

transmit a start signal to a next thread.

21. An apparatus according to claim 20 , each of the threads of execution further to:

enter a sleep state after issuing the command; and

wake from the sleep state after the data packet is stored in the memory,

wherein another one of the plurality of threads is active during the sleep state.

22. An apparatus according to claim 20 , each of the threads of execution further to:

release the buffer;

enter a sleep state after releasing the buffer; and

wake from the sleep state in response to the indication.

23. A system comprising:

a plurality of network devices; and

a switch to receive packets from one or more of the plurality of network devices, wherein the switch comprises:

a memory storing processor-executable program code; and

a processor in communication with the memory and operative in conjunction with the stored program code to:

invoke a plurality of threads of execution, each of the threads of execution

to:

receive a start signal from a previous thread;

receive a data packet from a buffer;

issue a command to store the data packet in a memory;

receive a continue signal from the previous thread;

transmit a continue signal to a next thread after the data packet is stored in the memory;

dispose of the data packet;

receive an indication that the buffer has received a new packet;

receive a start signal from the previous thread; and

transmit a start signal to a next thread.

24. A system according to claim 23 , each of the threads of execution further to:

enter a sleep state after issuing the command; and

wake from the sleep state after the data packet is stored in the memory,

wherein another one of the plurality of threads is active during the sleep state.

25. A system according to claim 23 , each of the threads of execution further to:

release the buffer;

enter a sleep state after releasing the buffer; and

wake from the sleep state in response to the indication.