IP Library Granted Patent US 6,916,373
Granted Patent B2
US 6,916,373 · App. 10/449,492 · Granted Jul 12, 2005

Semiconductor manufacturing method

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Quick Facts
Patent No.
US 6,916,373
App. No.
10/449,492
Granted
Jul 12, 2005
Kind
B2
Abstract

A method for manufacturing a semiconductor using a wafer carrier, wherein the temperature of a wafer can be made uniform with few differences in surface composition distribution. A plurality of grooves are formed at the bottom of a wafer pocket of a wafer carrier, to make uniform the temperature of the wafer surface by diffusing heat. The grooves are deeper at the peripheral part of the wafer than at the central part, and groove density is higher at the peripheral part than at the central part. The groove patterns may include a plurality of wedge-shaped grooves widening from the central part toward the peripheral part, a plurality of circular grooves with narrowing interval therebetween from the central part toward the peripheral part, circular grooves with the diameter shortened from the central part toward the peripheral part, and square grooves with shortened sides from the central part toward the peripheral part.

Claims (36)

1. A method for manufacturing a semiconductor, wherein crystal growth is carried out by using a wafer carrier having a spot facing part, comprising:

carrying out crystal growth by mounting the wafer at a bottom of the spot facing part, the spot facing part having a plurality of grooves formed therein to make a surface temperature of the wafer uniform by diffusing heat,

wherein a depth of the plurality of grooves formed at the spot facing part is deeper at a peripheral part of the wafer than at a central part of the wafer.

2. A method for manufacturing a semiconductor, wherein crystal growth is carried out by using a wafer carrier having a spot facing part, comprising:

carrying out crystal growth by mounting the wafer at a bottom of the spot facing part, the spot facing part having a plurality of grooves formed therein to make a surface temperature of the wafer uniform by diffusing heat,

wherein a density of the plurality of grooves formed at the spot facing part is higher at a peripheral part of the wafer than at a central part of the wafer.

3. A method for manufacturing a semiconductor, wherein crystal growth is carried out by using a wafer carrier having a spot facing part, comprising:

carrying out crystal growth by mounting the wafer on a spacer plate placed on the spot facing part, the spacer plate having a plurality of grooves formed therein to make a surface temperature of the wafer uniform by diffusing heat,

wherein a depth of the plurality of grooves formed in the spacer plate is deeper at a peripheral part of the wafer than at a central part of the wafer.

4. A method for manufacturing a semiconductor, wherein crystal growth is carried out by using a wafer carrier having a spot facing part, comprising:

carrying out crystal growth by mounting the wafer on a spacer plate placed on the spot facing part, the spacer plate having a plurality of grooves formed therein to make a surface temperature of the wafer uniform by diffusing heat,

wherein a density of the plurality of grooves formed in the spacer plate is higher at a peripheral part of the wafer than at a central part of the wafer.

5. A method for manufacturing a semiconductor, wherein crystal growth is carried out by using a wafer carrier having a spot facing part, comprising:

forming a plurality of grooves at a rear surface of the wafer, to make a surface temperature of the wafer uniform by diffusing heat; and

carrying out crystal growth by mounting the wafer having the plurality of grooves formed therein, on the spot facing part,

wherein a depth of the plurality of grooves formed in the rear surface of the wafer is deeper at a peripheral part of the wafer than at a central part of the wafer.

6. A method for manufacturing a semiconductor, wherein crystal growth is carried out by using a wafer carrier having a spot facing part, comprising:

forming a plurality of grooves at a rear surface of the wafer, to make a surface temperature of the wafer uniform by diffusing heat; and

carrying out crystal growth by mounting the wafer having the plurality of grooves formed therein, on the spot facing part,

wherein a density of the plurality of grooves formed in the rear surface of the wafer is higher at a peripheral part of the wafer than at a central part of the wafer.

7. A method for manufacturing a semiconductor according to claim 5 , wherein the plurality of grooves are formed by using photolithography.

8. A method for manufacturing a semiconductor according to claim 5 , wherein the plurality of grooves are formed by using etching.

9. A method for manufacturing a semiconductor according to claim 5 , wherein the plurality of grooves are removed by carrying out polishing of the rear surface after the crystal growth.

10. A method for manufacturing a semiconductor, wherein crystal growth is carried out by using a wafer carrier having a spot facing part, comprising:

forming an insulating film on a rear surface of the wafer;

forming a plurality of grooves in the insulating film, to make a surface temperature of the wafer uniform by diffusing heat; and

carrying out crystal growth by mounting the wafer having the insulating film with the plurality of grooves formed therein, on the spot facing part.

11. A method for manufacturing a semiconductor according to claim 10 , wherein a depth of the plurality of grooves formed in the insulating film is deeper at a peripheral part of the wafer than at a central part of the wafer.

12. A method for manufacturing a semiconductor according to claim 10 , wherein a density of the plurality of grooves formed in the insulating film is higher at a peripheral part of the wafer than at a central part of the wafer.

13. A method for manufacturing a semiconductor according to claim 10 , wherein the plurality of grooves are formed by using photolithography.

14. A method for manufacturing a semiconductor according to claim 10 , wherein the plurality of grooves are formed by using etching.

15. A method for manufacturing a semiconductor according to claim 10 , wherein the insulating film with the plurality of grooves formed therein is removed by etching after the crystal growth.

16. A method for manufacturing a semiconductor according to claim 10 , wherein the insulating film is a silicon oxide film.

17. A method for manufacturing a semiconductor according to claim 6 , wherein the plurality of grooves are formed by using photolithography.

18. A method for manufacturing a semiconductor according to claim 6 , wherein the plurality of grooves are formed by using etching.

19. A method for manufacturing a semiconductor according to claim 6 , wherein the plurality of grooves are removed by carrying out polishing of the rear surface after the crystal growth.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 23, 2023
From: NEOPHOTONICS SEMICONDUCTOR GK
To: NEOPHOTONICS CORPORATION
Reel/Frame 063148/0468 →
CHANGE OF NAME Recorded Oct 22, 2013
From: OKI SEMICONDUCTOR CO., LTD.
To: LAPIS SEMICONDUCTOR CO., LTD.
Reel/Frame 031627/0671 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 20, 2013
From: LAPIS SEMICONDUCTOR CO., LTD.
To: NEOPHOTONICS SEMICONDUCTOR GK
Reel/Frame 031040/0194 →
CHANGE OF NAME Recorded Dec 18, 2008
From: OKI ELECTRIC INDUSTRY CO., LTD.
To: OKI SEMICONDUCTOR CO., LTD.
Reel/Frame 022038/0711 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 7, 2005
From: NAKAMURA, KOJI
To: OKI ELECTRIC INDUSTRY CO., LTD.
Reel/Frame 016024/0110 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 2, 2003
From: NAKAMURA, KOJI
To: OKI ELECTRIC INDUSTRY CO., LTD.
Reel/Frame 014141/0137 →