Patent Assignment
Reel/Frame 022038/0711
CHANGE OF NAME
Recorded: 2008-12-18
Received: 2008-12-24
Pages: 15
Assignor
OKI ELECTRIC INDUSTRY CO., LTD.
Executed: 2008-10-01
Assignee
OKI SEMICONDUCTOR CO., LTD.
550-1 HIGASHIASAKAWA-CHO, HACHIOJI-SHI, TOKYO, JPX, 193-8550, JAPAN
Covered Applications
(100)
SEMICONDUCTOR INTEGRATED CIRCUIT WHICH PROPERLY EXECUTES AN OPERATIONAL TEST OF A CIRCUIT UNDER TEST IN THE SEMICONDUCTOR INTEGRATED CIRCUIT
App. No. 11/965,790
→
SEMICONDUCTOR DEVICE WITH SIGNAL LINE HAVING DECREASED CHARACTERISTIC IMPEDANCE
App. No. 11/785,708
→
METHOD OF FABRICATING A DUAL-GATE STRUCTURE THAT PREVENTS CUT-THROUGH AND LOWERED MOBILITY
App. No. 11/727,290
→
TEST CIRCUIT FOR SEMICONDUCTOR DEVICE
App. No. 11/709,786
→
SEMICONDUCTOR SUBSTRATE SURFACE PROTECTION METHOD
App. No. 11/700,889
→
Full depletion SOI-MOS transistor
App. No. 11/655,992
→
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE WITH IMPROVED DESIGN FREEDOM OF EXTERNAL TERMINAL
App. No. 11/508,212
→
EVALUATION TEG FOR SEMICONDUCTOR DEVICE AND MELHOD OF EVALUATION
App. No. 11/449,007
→
FABRICATION METHOD FOR CHIP SIZE PACKAGE AND NON-CHIP SIZE PACKAGE SEMICONDUCTOR DEVICES
App. No. 11/368,614
→
SEMICONDUCTOR MEMORY DEVICE
App. No. 11/319,365
→
METHOD OF PRODUCING A SEMICONDUCTOR DEVICE HAVING AN OXIDE FILM
App. No. 11/237,688
→
SEMICONDUCTOR DEVICE WITH SIGNAL LINE HAVING DECREASED CHARACTERISTIC IMPEDANCE
App. No. 11/233,027
→
METHOD FOR FABRICATING A GATE MASK OF A SEMICONDUCTOR DEVICE
App. No. 11/231,820
→
TEST PATTERN FOR TESTING RESISTANCE OF PATTERN OF SEMICONDUCTOR SUBSTRATE
App. No. 11/228,391
→
METHOD OF FORMING A SEMICONDUCTOR LASER CHIP HAVING A MARKER
App. No. 11/210,842
→
VOLTAGE GENERATOR
App. No. 11/187,837
→
SEMICONDUCTOR DEVICE, METHOD FOR MOUNTING THE SAME, AND METHOD FOR REPAIRING THE SAME
App. No. 11/168,549
→
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE USING FLEXIBLE TUBE
App. No. 11/143,651
→
SEMICONDUCTOR MEMORY DEVICE
App. No. 11/117,456
→
SEMICONDUCTOR INTEGRATED CIRUIT WHICH PROPERLY EXECUTES AN OPERATIONAL TEST OF A CIRCUIT UNDER TEST IN THE SEMICONDUCTOR INTEGRATED CIRCUIT
App. No. 11/090,293
→
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE HAVING THROUGH HOLE WITH ADHESION LAYER THEREON
App. No. 11/083,311
→
SEMICONDUCTOR DEVICE
App. No. 11/081,635
→
SEMICONDUCTOR DEVICE WITH STACKED CHIPS
App. No. 11/025,065
→
ETCHING METHOD, GATE ETCHING METHOD, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES
App. No. 11/011,947
→
MULTI CHIP PACKAGE
App. No. 10/985,020
→
SEMICONDUCTOR DEVICE AND FABRICATION METHOD WITH ETCH STOP FILM BELOW ACTIVE LAYER
App. No. 10/982,839
→
SEMICONDUCTOR SUBSTRATE AND TEST PATTERN FOR THE SAME
App. No. 10/971,157
→
SEMICONDUCTOR DEVICE AND METHOD FOR TESTING THE SAME
App. No. 10/937,607
→
NONVOLATILE SEMICONDUCTOR STORAGE APPARATUS AND READOUT METHOD
App. No. 10/936,523
→
FABRICATION METHOD FOR STACKED MULTI-CHIP PACKAGE
App. No. 10/914,090
→
SEMICONDUCTOR INTEGRATED CIRCUIT
App. No. 10/911,530
→
SEMICONDUCTOR MEMORY DEVICE
App. No. 10/891,099
→
DUPLEXER
App. No. 10/886,047
→
SEMICONDUCTOR MEMORY DEVICE
App. No. 10/876,668
→
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
App. No. 10/856,551
→
PROCESSING EQUIPMENT
App. No. 10/831,284
→
SEMICONDUCTOR DEVICE WITH REDUCED INTERCONNECT CAPACITANCE
App. No. 10/812,959
→
MEMORY DEVICE HAVING REDUNDANT MEMORY CELL
App. No. 10/812,424
→
ELECTROSTATIC-PROTECTION DUMMY TRANSISTOR STRUCTURE
App. No. 10/810,668
→
WORK ATTRACTING APPARATUS AND WORK ATTRACTING METHOD
App. No. 10/809,683
→
METHOD OF TRANSFERRING DATA
App. No. 10/806,350
→
DIFFERENTIAL CURRENT DRIVER AND DATA TRANSMISSION METHOD
App. No. 10/788,468
→
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
App. No. 10/785,181
→
INTERNAL POWER SUPPLY CIRCUIT
App. No. 10/782,826
→
EVALUATION TEG FOR SEMICONDUCTOR DEVICE AND METHOD OF EVALUATION
App. No. 10/780,938
→
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
App. No. 10/779,650
→
DIGITAL SIGNAL PROCESSOR AND DIGITAL SIGNAL PROCESSING METHOD ENABLING CONCURRENT PROGRAM DOWNLOAD AND EXECUTION
App. No. 10/771,339
→
SEMICONDUCTOR INTEGRATED DEVICE
App. No. 10/769,818
→
SEMICONDUCTOR INTEGRATED CIRCUIT
App. No. 10/759,188
→
CIRCUIT BOARD FOR MOUNTING A SEMICONDUCTOR CHIP AND MANUFACTURING METHOD THEREOF
App. No. 10/756,366
→
FUSE LAYOUT AND METHOD OF TRIMMING
App. No. 10/752,542
→
SEMICONDUCTOR DEVICE HAVING A SHIELDING LAYER
App. No. 10/753,081
→
LEVEL TRANSFORMING CIRCUIT
App. No. 10/749,586
→
MULTI-CHIP PACKAGE
App. No. 10/748,257
→
SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING SEMICONDUCTOR DEVICE
App. No. 10/748,258
→
MEMORY CIRCUIT AND METHOD OF READING DATA
App. No. 10/747,241
→
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
App. No. 10/747,317
→
SYSTEM LSI
App. No. 10/735,806
→
Data rearrangement method
App. No. 10/733,302
→
ESTIMATION OF REMAINING FILM THICKNESS DISTRIBUTION, CORRECTION OF PATTERNING AND INSULATION FILM REMOVING MASKS WITH REMAINING FILM THICKNESS DISTRIBUTION, AND PRODUCTION OF SEMICONDUCTOR DEVICE WITH CORRECTED PATTERNING AND INSULATION FILM REMOVING MASKS
App. No. 10/732,343
→
METHOD OF FORMING FILM INCLUDING A COMB TOOTH PATTERNING FILM
App. No. 10/732,213
→
VOLTAGE SENSING CIRCUIT
App. No. 10/730,997
→
SEMICONDUCTOR INTEGRATED CIRCUIT
App. No. 10/731,083
→
DIGITAL CORDLESS TELEPHONE
App. No. 10/726,691
→
EXTENDING CIRCUIT FOR MEMORY AND TRANSMITTING-RECEIVING DEVICE USING EXTENDING CIRCUIT FOR MEMORY
App. No. 10/724,045
→
DRIVING CIRCUIT FOR LIQUID CRYSTAL DISPLAY
App. No. 10/724,070
→
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
App. No. 10/722,419
→
SEMICONDUCTOR DEVICE WITH IMPROVED DESIGN FREEDOM OF EXTERNAL TERMINAL
App. No. 10/722,559
→
SEMICONDUCTOR DEVICE WITH IMPROVED DESIGN FREEDOM OF EXTERNAL TERMINAL
App. No. 10/722,446
→
SEMICONDUCTOR CHIP WITH PASSIVE ELEMENT IN A WIRING REGION OF THE CHIP
App. No. 10/722,561
→
SEMICONDUCTOR DEVICE
App. No. 10/722,520
→
ETCHING METHOD AND SEMICONDUCTOR DEVICE FABRICATING METHOD
App. No. 10/721,260
→
INTERFACE CIRCUIT
App. No. 10/720,387
→
SEMICONDUCTOR DEVICE
App. No. 10/714,962
→
APPARATUS FOR CONTROLLING THE FREQUENCY OF RECEIVED SIGNALS TO A PREDETERMINED FREQUENCY
App. No. 10/712,055
→
SEMICONDUCTOR DEVICE ADAPTED TO REMOVE NOISE FROM A SIGNAL
App. No. 10/712,090
→
PROCESS FOR FORMING A PATTERN
App. No. 10/712,017
→
METHOD OF MANUFACTURING WATER-REPELLING FILM
App. No. 10/704,873
→
SEMICONDUCTOR DEVICE
App. No. 10/702,561
→
SEMICONDUCTOR MEMORY DEVICE
App. No. 10/701,600
→
SEMICONDUCTOR DEVICE HAVING PACKAGING STRUCTURE
App. No. 10/697,880
→
SEMICONDUCTOR DEVICE WITH IMPROVED DESIGN FREEDOM OF EXTERNAL TERMINAL
App. No. 10/697,311
→
SEMICONDUCTOR DEVICE WITH IMPROVED DESIGN FREEDOM OF EXTERNAL TERMINAL
App. No. 10/697,015
→
SEMICONDUCTOR DEVICE WITH SIMPLIFIED CONSTITUTION
App. No. 10/697,315
→
SEMICONDUCTOR DEVICE WITH IMPROVED DESIGN FREEDOM OF EXTERNAL TERMINAL
App. No. 10/697,318
→
SEMICONDUCTOR DEVICE WITH IMPROVED DESIGN FREEDOM OF EXTERNAL TERMINAL
App. No. 10/697,247
→
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE HAVING METAL ALLOY INTERCONNECTION THAT HAS EXCELLENT EM LIFETIME
App. No. 10/697,335
→
SEMICONDUCTOR DEVICE
App. No. 10/697,156
→
APPARATUS FOR CORRECTING OFFSET VOLTAGE
App. No. 10/695,927
→
RELIABLE PHASE ADJUSTMENT CIRCUIT
App. No. 10/693,903
→
MICROCOMPUTER AND TEST METHOD THEREFORE
App. No. 10/688,897
→
SEMICONDUCTOR DEVICE HAVING FULLY AND PARTIALLY DEPLETED SOI ELEMENTS ON A SUBSTRATE
App. No. 10/687,967
→
OPTICAL SEMICONDUCTOR DEVICE HAVING SEMICONDUCTOR LASER AND ELECTROABSORPTIVE MODULATOR
App. No. 10/687,804
→
SYNCHRONIZING POSITION DETECTING CIRCUIT
App. No. 10/684,831
→
SEMICONDUCTOR DEVICE AND FABRICATION METHOD OF THE SAME
App. No. 10/681,283
→
RECEIVER/TRANSMITTER CIRCUIT
App. No. 10/681,326
→
SEMICONDUCTOR MEMORY DEVICE
App. No. 10/681,247
→
METHOD OF MANUFACTURING SEMICONDUCTOR ELEMENT
App. No. 10/677,221
→
SEMICONDUCTOR DEVICE
App. No. 10/676,071
→
DEVELOPMENT APPARATUS FOR MANUFACTURING SEMICONDUCTOR DEVICE
App. No. 10/676,073
→