IP Library Granted Patent US 7,049,676
Granted Patent B2
US 7,049,676 · App. 10/753,081 · Granted May 23, 2006

Semiconductor device having a shielding layer

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Quick Facts
Patent No.
US 7,049,676
App. No.
10/753,081
Granted
May 23, 2006
Kind
B2
Abstract

The semiconductor device includes a multilevel interconnection formed on a semiconductor substrate. The multilevel interconnection includes a plurality of wiring layers each of which is insulated by an insulating layer. A metal member is formed as a shielding film in a same plane as a wiring layer. As a result, the shielding layer can be formed without increasing the number of process steps.

Claims (34)

1. A semiconductor device comprising:

a semiconductor chip which includes a circuit element, a first wiring and an electrode pad, wherein the circuit element includes an electronic element, and wherein the first wiring is electrically connected between the circuit element to the electrode pad;

an insulating layer formed on the semiconductor chip, wherein the insulating layer has an opening which is aligned over the electrode pad;

an external terminal formed on the insulating layer;

a second wiring formed on the insulating layer, wherein the second wiring electrically connects the electrode pad to the external terminal via the opening; and

a shielding film located in a same plane as the first wiring and interposed between the electronic element and the second wiring,

wherein the electronic element includes a capacitor, and wherein the shielding film completely overlaps the capacitor.

2. The semiconductor device according to claim 1 , wherein the circuit element comprises a voltage controlled oscillator which includes the capacitor.

3. The semiconductor device according to claim 2 , wherein the voltage controlled oscillator generates a signal having a frequency of at least 300 MHz.

4. A semiconductor device comprising:

a semiconductor chip which includes a circuit element, a first wiring and an electrode pad, wherein the circuit element includes an electronic element, and wherein the first wiring is electrically connected between the circuit element to the electrode pad;

an insulating layer formed on the semiconductor chip, wherein the insulating layer has an opening which is aligned over the electrode pad;

an external terminal formed on the insulating layer;

a second wiring formed on the insulating layer, wherein the second wiring electrically connects the electrode pad to the external terminal via the opening; and

a shielding film located in a same plane as the first wiring and interposed between the electronic element and the second wiring,

wherein the shielding film is a metal and is connected to a ground voltage.

5. A semiconductor device composing:

a semiconductor chip which includes a circuit element, a first wiring and an electrode pad, wherein the circuit element includes an electronic element, and wherein the first wiring is electrically connected between the circuit element to the electrode pad;

an insulating layer formed on the semiconductor chip, wherein the insulating layer has an opening which is aligned over the electrode pad;

an external terminal formed on the insulating layer;

a second wiring formed on the insulating layer, wherein the second wiring electrically connects the electrode pad to the external terminal via the opening; and

a shielding film located in a same plane as the first wiring and interposed between the electronic element and the second wiring,

wherein the electrode pad is located in a peripheral region of the semiconductor device, and wherein the external terminal is located in a central region of the semiconductor device.

6. A semiconductor device comprising:

a semiconductor chip;

a first inductor formed on the semiconductor chip;

a first insulating layer formed on the semiconductor chip and the first inductor;

a first shielding film formed on the first insulating layer;

a second insulating layer formed on the first insulating layer and the first shielding film;

a second shielding film formed on the second insulating layer;

a third insulating layer formed on the second insulating layer and the second shielding film; and

a second inductor and an external terminal formed on the third insulating layer;

wherein the first inductor is located under the first shielding film and the second shielding film is located under the second inductor.

7. The semiconductor device according to claim 6 , wherein the first shielding film and the second shielding film are a magnetic material.

Assignments (3)
CHANGE OF NAME Recorded Mar 21, 2014
From: OKI SEMICONDUCTOR CO., LTD
To: LAPIS SEMICONDUCTOR CO., LTD.
Reel/Frame 032495/0483 →
CHANGE OF NAME Recorded Dec 18, 2008
From: OKI ELECTRIC INDUSTRY CO., LTD.
To: OKI SEMICONDUCTOR CO., LTD.
Reel/Frame 022038/0711 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 12, 2004
From: TANABE, SHINJI; MARUKO, TUGUTO
To: OKI ELECTRIC INDUSTRY CO., LTD.
Reel/Frame 015555/0632 →