Method for fabricating a gate mask of a semiconductor device
A nitride layer of the gate mask for the semiconductor device is deposited at a temperature higher than 750 deg. C so as to release hydrogen from the nitride layer. Alternatively, a nitride layer of the gate mask for the semiconductor device is deposited in a gas atmosphere with use of an ammonia gas and a silane gas such that a flow rate of the ammonia gas is set at least twenty times or greater than that of the silane gas. Accordingly, the problem with respect to the threshold voltages Vt of the semiconductor devices varying greatly from device to device when the polysilicon layer or the amorphous silicon layer is formed in the vicinity of the nitride layer and is doped with Group III impurities, will be solved.
1. A method for fabricating a semiconductor device, comprising:
providing a silicon substrate;
forming an insulator layer on a surface of the silicon substrate;
forming a polysilicon layer on a surface of the insulator layer;
forming a tungsten silicide layer on a surface of the polysilicon layer;
forming a nitride layer on a surface of the tungsten silicide layer;
forming a resist pattern on a surface of the nitride layer;
patterning the nitride layer by using the resist pattern as a mask; and
patterning the tungsten silicide layer and the polysilicon layer by using the nitride layer as a mask to form a gate electrode,
wherein the nitride layer is deposited in a gas atmosphere of an ammonia gas and a dichlorosilane gas, a flow rate of said ammonia gas being at least twenty times a flow rate of the dichlorosilane gas.
2. A method for fabricating a semiconductor device, comprising:
providing a silicon substrate;
forming an insulator layer on a surface of the silicon substrate;
forming a polysilicon layer on a surface of the insulator layer;
forming a tungsten silicide layer on a surface of the polysilicon layer;
forming a nitride layer on a surface of the tungsten silicide layer;
forming a resist pattern on a surface of the nitride layer;
patterning the nitride layer by using the resist pattern as a mask; and
patterning the tungsten silicide layer and the polysilicon layer by using the nitride layer as a mask to form a gate electrode,
wherein the nitride layer is deposited in a gas atmosphere of an ammonia gas and a dichlorosilane gas, a flow rate of said ammonia gas being from twenty to one hundred times a flow rate of the dichlorosilane gas.