IP Library Granted Patent US 6,921,912
Granted Patent B2
US 6,921,912 · App. 10/452,637 · Granted Jul 26, 2005

Diode/superionic conductor/polymer memory structure

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Quick Facts
Patent No.
US 6,921,912
App. No.
10/452,637
Granted
Jul 26, 2005
Kind
B2
Abstract

A conjugated polymer layer with a built-in diode is formed by providing a first metal-chalcogenide layer over a bottom electrode. Subsequently, a second metal-chalcogenide layer is provided over and in contact with the first metal-chalcogenide layer. The first metal-chalcogenide layer has a first conductivity type and the second metal-chalcogenide layer has a second conductivity type. The plane of contact between the first and second metal-chalcogenide layers creates the p-n junction of the built-in diode. Then a polymer layer is selectively deposited on the second metal-chalcogenide layer. The second metal-chalcogenide layer provides ions to the polymer layer to change its resistivity. A top electrode is then provided over the polymer layer. An exemplary memory cell may have the following stacked structure: first electrode/n-type semiconductor/p-type semiconductor/conjugated polymer/second electrode.

Claims (42)

1. A semiconductor device comprising:

a first electrode;

a first metal-chalcogenide layer of a first conductivity type in contact with said first electrode;

a second metal-chalcogenide layer of a second conductivity type in contact with said first metal-chalcogenide layer;

a polymer layer in contact with said second metal-chalcogenide layer; and

a second electrode in contact with said polymer layer.

2. The semiconductor device of claim 1 , wherein said first conductivity type is n-type conductivity.

3. The semiconductor device of claim 2 , wherein said second conductivity type is p-type conductivity.

4. The semiconductor device of claim 2 , wherein said first metal-chalcogenide layer is in an n-type semiconductor phase.

5. The semiconductor device of claim 2 , wherein said first metal-chalcogenide layer is in a superionic conductor phase.

6. The semiconductor device of claim 3 , wherein said second semiconductor layer is in a p-type semiconductor phase.

7. The semiconductor of claim 3 , wherein said second semiconductor layer is in a superionic conductor phase.

8. The semiconductor device of claim 1 , wherein said first electrode includes a conductive material selected from the group consisting of metals, conductive oxides, semiconductors, and conductive polymers.

9. The semiconductor device of claim 8 , wherein said first electrode does not comprise copper.

10. The semiconductor device of claim 2 , wherein said first metal-chalcogenide layer comprises Ag 2 Se.

11. The semiconductor device of claim 10 , wherein said second metal-chalcogenide layer comprises Cu 2 Se.

12. The semiconductor device of claim 2 , wherein said first metal-chalcogenide layer comprises Ag 2 S.

13. The semiconductor device of claim 12 , wherein said second metal-chalcogenide layer comprises Cu 2 S.

14. The semiconductor device of claim 1 , wherein said polymer layer includes a conjugated polymer material that changes resistance in response to an applied electric field.

15. The semiconductor device of claim 14 , wherein said conjugated polymer material is selected from the group consisting of polymethylphenylacetylene, copperphtalocyanine, polyparaphenylene, polyphenylenevinylene, polyaniline, polythiophene and polypyrrole.

16. The semiconductor device of claim 1 , wherein said second electrode includes a conductive material selected from the group consisting of metals, conductive oxides, semiconductors, and conductive polymers.

17. A semiconductor device comprising:

a substrate;

a bottom electrode in contact with said substrate;

a polymer layer in contact with said bottom electrode;

a first metal-chalcogenide layer of a first conductivity in contact with said polymer layer; and

a second metal-chalcogenide layer of a second conductivity in contact with said first metal-chalcogenide layer.

18. The semiconductor device of claim 17 , wherein said bottom electrode comprises copper.

19. The semiconductor device of claim 17 , further comprising a top electrode that does not comprise copper.

20. The semiconductor device of claim 19 , wherein said first conductivity type is p-type conductivity.

21. The semiconductor device of claim 20 , wherein said second type is n-type conductivity.

22. The semiconductor device of claim 21 , wherein said first metal-chalcogenide layer is a Cu 2 Se layer and said second metal-chalcogenide layer is an Ag 2 Se layer.

23. The semiconductor device of claim 21 , wherein said first metal-chalcogenide layer is a Cu 2 S layer and said second metal-chalcogenide layer is an Ag 2 S layer.

24. A semiconductor device comprising:

a first electrode;

a diode in contact with said electrode, said diode comprising a first metal-chalcogenide layer of a first conductivity type;

a polymer layer in contact with said diode; and

a second electrode in contact with said polymer layer.

25. The semiconductor device of claim 24 , wherein said diode further comprises a second metal-chalcogenide layer of a second conductivity type.

26. The semiconductor device of claim 25 , wherein said first conductivity type is n-type conductivity.

27. The semiconductor device of claim 26 , wherein said second conductivity type is p-type conductivity.

28. The semiconductor device of claim 27 , wherein said second metal-chalcogenide layer of said diode contacts said polymer layer.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 1, 2016
From: MICRON TECHNOLOGY, INC
To: OVONYX MEMORY TECHNOLOGY, LLC
Reel/Frame 039974/0496 →