Method of manufacturing a semiconductor device and semiconductor device obatined with such a method
The invention relates to a method of manufacturing a semiconductor device ( 10 ) with a field effect transistor, in which method a semiconductor body ( 1 ) of a semiconductor material is provided, at a surface thereof, with a source region ( 2 ) and a drain region ( 3 ) and with a gate region ( 4 ) between the source region ( 2 ) and the drain region ( 3 ), which gate region comprises a semiconductor region ( 4 A) of a further semiconductor material that is separated from the surface of the semiconductor body ( 1 ) by a gate dielectric ( 5 ), and with spacers ( 6 ) adjacent to the gate region ( 4 ), for forming the source and drain regions ( 2,3 ), in which method the source region ( 2 ) and the drain region ( 3 ) are provided with a metal layer ( 7 ) which is used to form a compound ( 8 ) of the metal and the semiconductor material, and the gate region ( 4 ) is provided with a metal layer ( 7 ) which is used to form a compound ( 8 ) of the metal and the further semiconductor material. The known method in which different metal layers are used to silicidate source and drain regions and gate regions ( 2,3,4 ) has several drawbacks. A method according to the invention is characterized in that before the spacers ( 6 ) are formed, a sacrificial region ( 4 B) of a material that may be selectively etched with respect to the semiconductor region ( 4 A) is deposited on top of the semiconductor region ( 4 A), and after the spacers ( 6 ) have been formed, the sacrificial layer ( 4 B) is removed by etching, and after removal of the sacrificial layer ( 4 B), a single metal layer ( 7 ) is deposited contacting the source, drain and gate regions ( 2,3,4 ). This method is on the one hand very simple as it requires only a single metal layer and few, straight-forward steps and it is compatible with existing (silicon) technology, and on the other hand it results in a (MOS)FET which does not suffer from a depletion layer effect in the fully silicided gate ( 4 ).
1 . Method of manufacturing a semiconductor device with a field effect transistor,
in which method a semiconductor body of a semiconductor material is provided, at a surface thereof, with a source region and a drain region and with a gate region between the source region and the drain region, which gate region comprises
a semiconductor region of a further semiconductor material that is separated from the surface of the semiconductor body by a gate dielectric, and
with spacers adjacent to the gate region for forming the source and drain regions,
in which method the source region and the drain region are provided with a metal layer which is used to form a compound of the metal and the semiconductor material, and
the gate region is provided with a metal layer which is used to form a compound of the metal and the further semiconductor material, characterized in that before the spacers are formed,
a sacrificial region of a material that may be selectively etched with respect to the semiconductor region is deposited on top of the semiconductor region, and
after the spacers have been formed, the sacrificial layer is removed by etching, and
after removal of the sacrificial layer, a single metal layer is deposited contacting the source, drain and gate regions.
2 . A method as claimed in claim 1 , characterized in that
the spacers are formed by depositing a layer of a dielectric material on top of the semiconductor body on which the gate region comprising the semiconductor region and the sacrificial region is present and by subsequently removing the deposited layer on top of and on both sides of the gate region by etching.
3 . A method as claimed in claim 1 , characterized in that the semiconductor region is completely consumed during the formation of the compound of the metal and the further semiconductor material.
4 . A method as claimed in claim 1 , characterized in that
the formation of the compounds between the metal and the semiconductor material and the metal and the further semiconductor material is carried out in two separate heating steps,
the first heating step resulting in an intermediate compound with a low content of the semiconductor material or of the further semiconductor material and in
the second heating step the intermediate compound being converted to the compound having a higher content of the semiconductor material or of the further semiconductor material.
5 . A method as claimed in claim 4 , characterized in that
between the two heating steps, a part of the metal layer which has not reacted to form the intermediate compound is removed by etching.
6 . A method as claimed in claim 4 , characterized in that between the two heating steps, a layer of the further semiconductor material is deposited on the surface of the semiconductor body.
7 . A method as claimed in claim 6 , characterized in that after the second heating step, a part of the layer of the further semiconductor material which has not reacted to form the compound is removed by etching.
8 . A method as claimed in claim 1 , characterized in that after the formation of the compounds of the metal and the semiconductor material and of the metal and the further semiconductor material, the spacers ( 6 ) are removed.
9 . A method as claimed in claim 1 , characterized in that for the semiconductor material as well as for the further semiconductor material silicon is chosen, and for the intermediate compound and for the compound of the metal and the semiconductor material and the further semiconductor material a metal silicide is chosen.
10 . A semiconductor device comprising a field effect transistor obtained by a method as claimed in anyone of the preceding claims.