IP Library Granted Patent US 7,756,363
Granted Patent B2
US 7,756,363 · App. 10/545,384 · Granted Jul 13, 2010

System and method for image processing

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Quick Facts
Patent No.
US 7,756,363
App. No.
10/545,384
Granted
Jul 13, 2010
Kind
B2
Abstract

In image processing, parallel and synchronous pixel processing elements have a pixel value register, a neighbor value register, and a processor receiving adjacent pixel and neighbor values for four adjacent pixels. In a series of iterations, the neighbor value register is updated with—in one mode—the maximum and—in another mode—the minimum of: the current value; the pixel value from any adjacent pixel whose pixel value is different from the current pixel value and the neighbor value from an adjacent pixel whose pixel value is the same as the current pixel value. The pixel value is then replaced by the minimum or maximum (depending on the mode) of the current pixel and neighbor values. The modes may alternate with the number of iterations in each series remaining constant or growing.

Claims (80)

1. A digital circuit for object identification in an image or a sequence of images, each image comprising an array of pixels, the circuit comprising:

a processor comprising a plurality of processing components;

a plurality of substantially synchronously-operating pixel processing elements, one for each pixel in the pixel array of an image, each pixel processing element comprising a pixel value register receiving a value for that pixel and a neighbor value register, wherein each pixel processing element is associated with at least one of the processing components, and wherein the processor is configured to cause the digital circuit to perform the following operations for respective pixels:

receive adjacent pixel values and adjacent neighbor values for at least two adjacent pixels in the image or in either of the images respectively preceding and succeeding the image in the sequence of images, and

in a series of iterations, replace the value in the neighbor value register with a function of:

a current value in the neighbor value register;

the adjacent pixel value from an adjacent pixel whose pixel value is different from the current value of the pixel value register; or

the adjacent neighbor value from an adjacent pixel whose pixel value is the same as the current value of the pixel value register.

2. A circuit according to claim 1 , wherein one or more components of the plurality of processing components are adapted at the end of the series of iterations to store in the pixel value register one of the current value of the pixel value register and the current value of the neighbor value register.

3. A circuit according to claim 1 , wherein the function comprises the selection of one value from the values.

4. A circuit according to claim 3 , wherein the selection comprises one of the minimum, the maximum, or the median of the values.

5. A circuit according to claim 1 , wherein one or more components of the plurality of processing components are adapted in each iteration of the series of iterations to store in the neighbor value register the maximum of:

the current value in the neighbor value register;

each adjacent pixel value from respective adjacent pixels whose pixel values are different from the current value of the pixel value register; and

each adjacent neighbor value from respective adjacent pixels whose pixel values are the same as the current value of the pixel value register.

6. A circuit according to claim 5 , wherein one or more components of the plurality of processing components are adapted at the end of the series of iterations to store in the pixel value register the minimum of the current value of the pixel value register and the current value of the neighbor value register.

7. A circuit according to claim 1 , wherein one or more components of the plurality of processing components are adapted in each iteration of the series of iterations to store in the neighbor value register the minimum of:

the current value in the neighbor value register;

each adjacent pixel value from respective adjacent pixels whose pixel values are different from the current value of the pixel value register; and

each adjacent neighbor value from respective adjacent pixels whose pixel values are the same as the current value of the pixel value register.

8. A circuit according to claim 7 , wherein one or more components of the plurality of processing components are adapted at the end of the series of iterations to store in the pixel value register the maximum of the current value of the pixel value register and the current value of the neighbor value register.

9. A circuit according to claim 1 , wherein one or more components of the plurality of processing components

are adapted in a first mode to

store in the neighbor value register the maximum of:

a current value in the neighbor value register;

each adjacent pixel value from respective adjacent pixels whose pixel values are different from the current value of the pixel value register; and

each adjacent neighbor value from respective adjacent pixels pixel whose pixel values are the same as the current value of the pixel value register; and

at the end of the series of iterations to store in the pixel value register the minimum of the current value of the pixel value register and the current value of the neighbor value register; and

are adapted in a second mode to

store in the neighbor value register the minimum of:

the current value in the neighbor value register;

each adjacent pixel value from respective adjacent pixels whose pixel values are different from the current value of the pixel value register;

each adjacent neighbor value from respective adjacent pixels whose pixel values are the same as the current value of the pixel value register; and

at the end of the series of iterations to store in the pixel value register the maximum of the current value of the pixel value register and the current value of the neighbor value register.

10. A circuit according to claim 9 , wherein one or more components of the plurality of processing components alternate between two modes of operation.

11. A circuit according to claim 1 , wherein the number of iterations in the series of iterations remains constant.

12. A circuit according to claim 1 , wherein the series of iterations is controlled by a clock which counts to a value related to the horizontal and vertical dimensions of the image.

13. A circuit according to claim 1 , wherein the series of iterations is controlled by a central controller which receives from each pixel processing element an indication of whether that processing element has in the current iteration changed the value of the neighbor value register.

14. A method for object identification in an image or a sequence of images, each image comprising an array of pixels, the method comprising

performing a plurality of substantially synchronously-operating like pixel processing routines, one for each pixel in the pixel array of an image, each pixel processing routine comprising:

maintaining a pixel value and a neighbor value for the pixel,

selectively accessing adjacent pixel values and adjacent neighbor values for at least two adjacent pixels in the image or in either of the images respectively preceding and succeeding the image in the sequence of images, and

performing a series of iterations to replace the neighbor value with a function of:

the current neighbor value;

the adjacent pixel value from an adjacent pixel whose pixel value is different from the current pixel value or the adjacent neighbor value from an adjacent pixel whose pixel value is the same as the current pixel value.

15. A method according to claim 14 , wherein the processing routine at the end of the series of iterations maintains as the pixel value one of the current pixel value and the current neighbor value.

16. A method according to claim 14 , wherein the function comprises the selection of one value from the values.

17. A method according to claim 16 , wherein the selection comprises one of the minimum, the maximum or the median of the values.

18. A method according to claim 16 , further comprising stopping the series of repeated iterations when a current pixel value differs from its original value by more than a predetermined threshold.

19. A method according to claim 14 , in which there are repeated series of iterations with the pixel value being replaced with one of the current pixel value and the current neighbor value at the end of each such series.

20. A method according to claim 19 , wherein the function varies from one series of iterations to the next repeated series of iterations.

21. A method according to claim 19 , in which the number of iterations in each series is constant.

22. A method according to claim 19 , in which the number of iterations in each series increases as the series are repeated.

23. A method according to claim 19 , in which the number of iterations in each series is determined in a control procedure.

24. A method according to claim 23 , further comprising initiating transmission of an indication of whether that processing routine has in the current iteration changed the neighbor value to the control procedure.

25. A method according to claim 14 , further comprising, after a series of iterations, identifying cells of all adjacent pixels having the same current pixel value.

26. A method according to claim 25 , further comprising stopping the series of repeated iterations when the number of pixels in a cell exceeds a predetermined number of pixels.

27. A method according to claim 25 , further comprising outputting an indication of the cell to which each pixel belongs.

28. A digital circuit for object identification in an image or a sequence of images, each image comprising an array of pixels; the circuit comprising:

a plurality of substantially synchronously-operating pixel processing elements each including

a pixel value register;

a neighbor value register;

means for receiving adjacent pixel values and adjacent neighbor values for at least two adjacent pixels;

means for performing a series of iterations to replace the value in the neighbor value register with a function of:

a current value in the neighbor value register;

an adjacent pixel value from an adjacent pixel whose pixel value is different from the current value of the pixel value register; or

an adjacent neighbor value from an adjacent pixel whose value is the same as the current value of the pixel value register.

29. The circuit of claim 28 , wherein each pixel processing element further comprises:

means for storing in the pixel value register at the end of the series of iterations one of the current value of the pixel value register and the current value of the neighbor value register.

30. A method for processing an image comprising an array of pixels, the method comprising;

performing a plurality of iterations of substantially synchronous pixel processing routines, one routine for each pixel in a pixel array of an image, each routine comprising:

storing a current pixel value and a current neighbor value,

determining adjacent pixel values and adjacent neighbor values for at least two adjacent pixels in the image; and

replacing the current neighbor value with a function of

the current neighbor value;

the adjacent pixel value from an adjacent pixel whose pixel value is different from the current pixel value; or

the adjacent neighbor value from an adjacent pixel whose pixel value is the same as the current pixel value.

31. The method of claim 30 , wherein the pixel array of an image includes a portion of the pixels of the image.

32. The method of claim 30 , wherein the function comprises selecting one value from the current neighbor value, the adjacent pixel value, and the adjacent neighbor value.

33. The method of claim 30 , further comprising at the end of the plurality of iterations storing as the current pixel value one of the current pixel value and the current neighbor value.

Assignments (3)
MERGER Recorded Jan 14, 2016
From: AMSTR. INVESTMENTS 5 K.G., LLC
To: OL SECURITY LIMITED LIABILITY COMPANY
Reel/Frame 037494/0516 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 16, 2009
From: SNELL & WILCOX LIMITED
To: AMSTR. INVESTMENTS 5 K.G., LLC
Reel/Frame 022402/0432 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 24, 2006
From: KNEE, MICHAEL JAMES
To: SNELL & WILCOX LIMITED
Reel/Frame 017212/0826 →
Priority Claims (1)
GB 0303177.0 · Feb 12, 2004 · national
Continuity (1)
Related Publication 20060228007A1 · Oct 12, 2006