Method of manufacturing an electronic device
View Patent ↗A method of manufacturing an electronic device is provided wherein an interconnect is made using 193 nm lithography. No deformation of the desired linewidth takes place in that during a plasma gas is used which dissociates in low-weight ions. The electronic device is particularly an integrated circuit.
1. A method of manufacturing an electronic device comprising a plurality of electrical elements and an interconnect structure interconnecting said electrical elements according to a desired pattern, said structure containing vertical interconnects through at least one layer of dielectric material, in which method the provision of the vertical interconnects comprises the steps of:
providing at least one layer of dielectric material onto an electrically conductive surface;
providing a photoresist layer on the at least one layer of dielectric material and suitable for irradiation at a wavelength of at most 200 nm;
irradiating the photoresist layer at a wavelength of at most 200 nm and developing the photoresist layer to produce a patterned photoresist mask; and
patterning the layer of dielectric material using the patterned photoresist mask, characterized in that before patterning the layer of dielectric material a plasma ignition treatment is performed on the patterned photoresist mask with a plasma gas dissociating in ions with an atomic mass that is at most equal to that of CF.
2. A method as claimed in claim 1 , characterized in that the plasma gas is chosen from the group of N 2 , He, CF 4 .
3. A method as claimed in claim 2 , wherein the plasma gas is N 2 or He.
4. A method as claimed in claim 1 , characterized in that the photoresist layer comprises a material chosen from the group of polyacrylates and polymethacrylates.
5. A method as claimed in claim 1 , characterized in that a stack of layers of dielectric material is provided onto the conductive surface, which stack comprises at least one layer of a low-K material.
6. A method as claimed in claim 1 , characterized in that after patterning of the dielectric layer any resulting contact windows are filled with electrically conductive material, thereby providing the vertical interconnects.
7. A method as claimed in claim 1 , characterized in that the electrical elements are transistors and the electronic device is an integrated circuit.
8. A method as claimed in claim 1 , characterized in that the layer of dielectric material is patterned by dry etching.
9. A method as claimed in claim 8 , characterized in that the layer of dielectric material is etched with a plasma gas comprising a fluorine-containing material.
10. A method as claimed in claim 2 , characterized in that the layer of dielectric material is patterned by dry etching.
11. A method as claimed in claim 3 , characterized in that the layer of dielectric material is patterned by dry etching.
12. A method of claim 9 , wherein the plasma gas including a fluorine-containing material includes Ar/CH 2 F 2 /O 2 .
13. A method of claim 1 , wherein the plasma ignition treatment chemically modifies the photoresist.
14. A method of claim 13 , wherein the chemical modification of the photoresist includes completion of incomplete reactive group conversions.
15. A method of claim 1 , wherein the photoresist layer includes a material based on a ring opening metathesis polymer.
16. A method of claim 1 , wherein the photoresist layer includes a copolymer of an ester.
17. A method of claim 1 , wherein the photoresist layer includes an alkyl-substituted cyclopentylethylene, a norbornene-substituted cyclopentylethylene, a poly(substituted cyclopentylethylene), or a poly(substituted cyclohexylethylene).
18. A method of claim 1 , wherein the photoresist layer includes a (meth)acrylate with a-cyclic pendant groups or polar pendant groups.
19. A method of claim 1 , wherein the photoresist layer includes alternating copolymers of maleic anhydride and a cyclic olefin.
20. A method of claim 1 , wherein the photoresist layer includes alternating copolymers of vinyl ethers and maleic anhydride.
21. A method of claim 5 , wherein the at least one layer of a low-K material has a dielectric constant of 2.5 or less.
22. A method of claim 5 , wherein the at least one layer of a low-K material includes MSQ, HSQ, SiLK, benzocyclobutene, or organically modified porous silica.
23. A method of manufacturing an electronic device comprising a plurality of electrical elements and an interconnect structure interconnecting said electrical elements according to a desired pattern, said structure containing vertical interconnects through at least one layer of dielectric material, in which method the provision of the vertical interconnects comprises the steps of:
providing a stack of layers of dielectric material onto an electrically conductive surface, wherein the stack of layers of dielectric material includes, in order on the electrically conductive surface, a first layer, a second layer, a third layer, and a fourth layer, and wherein the first and third layers include a polyarylene-based material, the second layer includes a porous MSQ-type material, and the fourth layer includes a spin-on glass material;
providing a photoresist layer suitable for irradiation at a wavelength of at most 200 nm;
irradiating the photoresist layer at a wavelength of at most 200 nm and developing the photoresist layer to produce a patterned photoresist mask; and
patterning the layer of dielectric material using the patterned photoresist mask, characterized in that before patterning the layer of dielectric material a plasma ignition treatment is performed on the patterned photoresist mask with a plasma gas dissociating in ions with an atomic mass that is at most equal to that of CF.
24. A method of manufacturing an electronic device, the method comprising:
forming a plurality of electrical elements; and
forming an interconnect structure that interconnects said electrical elements according to a desired pattern, by
providing stacked layers of dielectric material on an electrically conductive surface,
providing a photoresist layer suitable for irradiation at a wavelength of at most 200 nm,
irradiating the photoresist layer at a wavelength of at most 200 nm and developing the photoresist layer to produce a patterned photoresist mask,
plasma ignition treating the patterned photoresist mask with a plasma gas dissociating in ions with an atomic mass that is at most equal to that of CF,
patterning the layer of dielectric material using the treated photoresist mask, and
forming vertical interconnects extending through at least one of the stacked layers of dielectric material.
25. The method of claim 24 , wherein the step of providing stacked layers includes providing, at least one layer including a polyarylene-based material, another layer including a porous MSQ-type material, and another layer including a spin-on glass material.
26. The method of claim 1 , wherein the step of providing the photoresist layer includes forming the photoresist layer on the dielectric material to be patterned.