IP Library Granted Patent US 7,592,674
Granted Patent B2
US 7,592,674 · App. 10/575,785 · Granted Sep 22, 2009

Semiconductor device with silicide-containing gate electrode and method of fabricating the same

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Quick Facts
Patent No.
US 7,592,674
App. No.
10/575,785
Granted
Sep 22, 2009
Kind
B2
Abstract

There is provided a semiconductor device which is capable of solving a problem of threshold control in CMOS transistor, accompanied with combination of a gate insulating film having a high dielectric constant and a metal gate electrode, and significantly enhancing performances without deterioration in reliability of a device. The semiconductor device includes a gate insulating film composed of a material having a high dielectric constant, and a gate electrode. A portion of the gate electrode making contact with the gate insulating film has a composition including silicide of metal M expressed with MxSi 1-X (0<X<1), as a primary constituent. X is greater than 0.5 (X>0.5) in a p-type MOSFET, and is equal to or smaller than 0.5 (X≦0.5) in a n-type MOSFET.

Claims (84)

1. A semiconductor device comprising a silicon substrate, a gate insulating film formed on said silicon substrate, and a gate electrode formed on said gate insulating film,

wherein at least a region of said gate electrode making contact with said gate insulating film is composed of silicide containing Ni 3 Si phase as a principal constituent.

2. The semiconductor device as set forth in claim 1 , wherein said gate insulating film includes an electrically insulating film having a high dielectric constant and containing one of metal oxide, metal silicate and metal oxide or metal silicate containing nitrogen therein.

3. The semiconductor device as set forth in claim 2 , wherein said electrically insulating film contains one of Hf and Zr.

4. The semiconductor device as set forth in claim 2 , further comprising a layer containing one of Hf and Zr therein between said electrically insulating film and said gate electrode.

5. The semiconductor device as set forth in claim 2 , wherein said electrically insulating film has a multi-layered structure including one of a silicon oxide film and a silicon nitride film, and one of a Hf-containing layer and a Zr-containing layer.

6. The semiconductor device as set forth in claim 2 , wherein said electrically insulating film contains HfSiON.

7. The semiconductor device as set forth in claim 2 , further comprising a HfSiON layer between said electrically insulating film and said gate electrode.

8. The semiconductor device as set forth in claim 2 , wherein said electrically insulating film has a multi-layered structure including one of a silicon oxide film and a silicon nitride film, and a HfSiON layer.

9. The semiconductor device as set forth in claim 1 , wherein said gate electrode is included in a p-type MOSFET.

10. A semiconductor device comprising a silicon substrate, a gate insulating film formed on said silicon substrate, and a gate electrode formed on said gate insulating film, in this order,

wherein said gate insulating film includes an electrically insulating film having a high dielectric constant and containing one of metal oxide, metal silicate and metal oxide or metal silicate containing nitrogen therein,

said gate electrode contains nickel silicide as a primary constituent, and has a region through which said gate electrode makes contact with said gate insulating film and which has a composition expressed with Ni x Si 1-x (0<X<1), and

said X is greater than 0.5 (X>0.5) in said nickel silicide contained in a gate electrode formed above a p-channel, and said X is equal to or smaller than 0.5 (X≦0.5) in said nickel silicide contained in a gate electrode formed above a n-channel.

11. The semiconductor device as set forth in claim 10 , wherein said electrically insulating film contains one of Hf and Zr.

12. The semiconductor device as set forth in claim 10 , further comprising a layer containing one of Hf and Zr therein between said electrically insulating film and said gate electrode.

13. The semiconductor device as set forth in claim 10 , wherein said electrically insulating film has a multi-layered structure including one of a silicon oxide film and a silicon nitride film, and one of a Hf-containing layer and a Zr-containing layer.

14. The semiconductor device as set forth in claim 10 , wherein said electrically insulating film contains HfSiON.

15. The semiconductor device as set forth in claim 10 , further comprising a HfSiON layer between said electrically insulating film and said gate electrode.

16. The semiconductor device as set forth in claim 10 , wherein said electrically insulating film has a multi-layered structure including one of a silicon oxide film and a silicon nitride film, and a HfSiON layer.

17. The semiconductor device as set forth in claim 10 , wherein, said gate electrode contains nickel silicide as a primary constituent, and assuming that a region of said nickel silicide making contact with said gate insulating film is expressed with Ni X Si 1-X (0<X<1), said X is equal to or greater than 0.6 and smaller than 1 (0.6≦X<1) in said nickel silicide contained in a gate electrode formed above a p-channel, and said X is greater than 0 and equal to or smaller than 0.5 (0<X≦0.5) in said nickel silicide contained in a gate electrode formed above a n-channel.

18. The semiconductor device as set forth in claim 10 , wherein said nickel silicide contained in said gate electrode formed above said p-channel contains Ni 3 Si phase as a principal constituent at least in a region through which said nickel silicide makes contact with said gate insulating film, and said nickel silicide contained in said gate electrode formed above said n-channel contains one of NiSi phase and NiSi 2 phase as a principal constituent at least in a region through which said nickel silicide makes contact with said gate insulating film.

19. A semiconductor device comprising a silicon substrate, a gate insulating film formed on said silicon substrate, and a gate electrode formed on said gate insulating film, in this order,

wherein said gate insulating film includes an electrically insulating film having a high dielectric constant and containing one of metal oxide, metal silicate and metal oxide or metal silicate containing nitrogen therein,

said gate electrode contains platinum silicide as a primary constituent, and has a region through which said gate electrode makes contact with said gate insulating film and which has a composition expressed with Pt x Si 1-x (0<X<1), and

said X is greater than 0.5 (X>0.5) in said platinum silicide contained in a gate electrode formed above a p-channel, and said X is equal to or smaller than 0.5 (X≦0.5) in said platinum silicide contained in a gate electrode formed above a n-channel.

20. A semiconductor device comprising a silicon substrate, a gate insulating film formed on said silicon substrate, and a gate electrode formed on said gate insulating film, in this order,

wherein said gate insulating film includes an electrically insulating film having a high dielectric constant and containing one of metal oxide, metal silicate and metal oxide or metal silicate containing nitrogen therein,

said gate electrode contains tantalum silicide as a primary constituent, and has a region through which said gate electrode makes contact with said gate insulating film and which has a composition expressed with Ta x Si 1-x (0<X<1), and

said X is greater than 0.5 (X>0.5) in said tantalum silicide contained in a gate electrode formed above a p-channel, and said X is equal to or smaller than 0.5 (X≦0.5) in said tantalum silicide contained in a gate electrode formed above a n-channel.

21. A semiconductor device comprising a silicon substrate, a gate insulating film formed on said silicon substrate, and a gate electrode formed on said gate insulating film, in this order,

wherein said gate insulating film includes an electrically insulating film having a high dielectric constant and containing one of metal oxide, metal silicate and metal oxide or metal silicate containing nitrogen therein,

said gate electrode contains titanium silicide as a primary constituent, and has a region through which said gate electrode makes contact with said gate insulating film and which has a composition expressed with Ti x Si 1-x (0<X<1), and

said X is greater than 0.5 (X>0.5) in said titanium silicide contained in a gate electrode formed above a p-channel, and said X is equal to or smaller than 0.5 (X≦0.5) in said titanium silicide contained in a gate electrode formed above a n-channel.

22. A semiconductor device comprising a silicon substrate, a gate insulating film formed on said silicon substrate, and a gate electrode formed on said gate insulating film, in this order,

wherein said gate insulating film includes an electrically insulating film having a high dielectric constant and containing one of metal oxide, metal silicate and metal oxide or metal silicate containing nitrogen therein,

said gate electrode contains hafnium silicide as a primary constituent, and has a region through which said gate electrode makes contact with said gate insulating film and which has a composition expressed with Hf x Si 1-x (0<X<1), and

said X is greater than 0.5 (X>0.5) in said hafnium silicide contained in a gate electrode formed above a p-channel, and said X is equal to or smaller than 0.5 (X≦0.5) in said hafnium silicide contained in a gate electrode formed above a n-channel.

23. A semiconductor device comprising a silicon substrate, a gate insulating film formed on said silicon substrate, and a gate electrode formed on said gate insulating film, in this order,

wherein said gate insulating film includes an electrically insulating film having a high dielectric constant and containing one of metal oxide, metal silicate and metal oxide or metal silicate containing nitrogen therein,

said gate electrode contains cobalt silicide as a primary constituent, and has a region through which said gate electrode makes contact with said gate insulating film and which has a composition expressed with Co x Si 1-x (0<X<1), and

said X is greater than 0.5 (X>0.5) in said cobalt silicide contained in a gate electrode formed above a p-channel, and said X is equal to or smaller than 0.5 (X≦0.5) in said cobalt silicide contained in a gate electrode formed above a n-channel.

24. A semiconductor device comprising a silicon substrate, a gate insulating film formed on said silicon substrate, and a gate electrode formed on said gate insulating film, in this order,

wherein said gate insulating film includes an electrically insulating film having a high dielectric constant and containing one of metal oxide, metal silicate and metal oxide or metal silicate containing nitrogen therein,

said gate electrode contains zirconium silicide as a primary constituent, and has a region through which said gate electrode makes contact with said gate insulating film and which has a composition expressed with Zr x Si 1-x (0<X<1), and

said X is greater than 0.5 (X>0.5) in said zirconium silicide contained in a gate electrode formed above a p-channel, and said X is equal to or smaller than 0.5 (X≦0.5) in said zirconium silicide contained in a gate electrode formed above a n-channel.

25. A semiconductor device comprising a silicon substrate, a gate insulating film formed on said silicon substrate, and a gate electrode formed on said gate insulating film, in this order,

wherein said gate insulating film includes an electrically insulating film having a high dielectric constant and containing one of metal oxide, metal silicate and metal oxide or metal silicate containing nitrogen therein,

said gate electrode contains vanadium silicide as a primary constituent, and has a region through which said gate electrode makes contact with said gate insulating film and which has a composition expressed with V x Si 1-x (0<X<1), and

said X is greater than 0.5 (X>0.5) in said vanadium silicide contained in a gate electrode formed above a p-channel, and said X is equal to or smaller than 0.5 (X≦0.5) in said vanadium silicide contained in a gate electrode formed above a n-channel.

26. A method of fabricating a semiconductor device, comprising:

depositing poly-silicon (poly-Si) on a gate insulating film and patterning said poly-silicon into a gate electrode having desired dimension;

depositing one of metals selected from Ni, Pt, Ta, Ti, Hf, Co, Zr and V on said gate electrode;

thermally annealing said gate electrode and said one of metals to entirely turn said gate electrode to silicide of said one of metals; and

removing a portion of said one of metals which was not turned into said silicide, by etching,

assuming that said one of metals is expressed with M, and said silicide has a portion through which said silicide makes contact with said gate insulating film and which has a composition expressed with M X Si 1-X (0<X<1),

wherein said metal M has such a thickness t 1 above a p-channel device that, when poly-silicon and said metal M react with each other to make silicide, a portion of said silicide making contact with said gate insulating film has composition expressed with M X Si 1-X (0.5<X<1), and has such a thickness t 2 above a n-channel device that, when poly-silicon and said metal M react with each other to make silicide, a portion of said silicide making contact with said gate insulating film has composition expressed with M X Si 1-X (0<X≦0.5).

27. The method as set forth in claim 26 , wherein the step of depositing said metal M or forming said nickel film comprises:

after forming said metal M or said nickel film above a n-channel device or a p-channel device by the thickness of t 2 , forming diffusion-preventing layer which is stable to said metal M or nickel, only above said n-channel device; and

depositing said metal M or forming said nickel film by the thickness of (t 1 −t 2 ).

28. The method as set forth in claim 27 , wherein said diffusion-preventing layer can be etched in selected areas relative to silicide of said metal M.

29. The method as set forth in claim 27 , wherein said diffusion-preventing layer contains one of TiN and TaN as a primary constituent.

30. The method as set forth in claim 26 , wherein said gate electrode and said metal M or said nickel film are thermally annealed for silicidation at such a temperature that a resistance of metal silicide formed in a diffusion contact region of said semiconductor device is not increased.

31. A method of fabricating a semiconductor device, comprising:

depositing poly-silicon on a gate insulating film and patterning said poly-silicon into a gate electrode having desired dimension;

forming a nickel (Ni) film on said gate electrode;

thermally annealing said gate electrode and said nickel film to entirely turn said gate electrode to nickel silicide (NiSi); and

removing a portion of said nickel film which was not turned into said nickel silicide, by etching,

wherein said nickel film has such a thickness t 1 above a p-channel device that, when poly-silicon and nickel react with each other to make nickel silicide, a portion of said nickel silicide making contact with said gate insulating film has composition expressed with Ni X Si 1-X (0.6≦X<1), and has such a thickness t 2 above a n-channel device that, when poly-silicon and nickel react with each other to make nickel silicide, a portion of said nickel silicide making contact with said gate insulating film has composition expressed with Ni X Si 1-x (0<X≦0.5).

32. A method of fabricating a semiconductor device, comprising:

depositing poly-silicon on a gate insulating film and patterning said poly-silicon into a gate electrode having desired dimension;

forming a nickel (Ni) film on said gate electrode;

thermally annealing said gate electrode and said nickel film to entirely turn said gate electrode to nickel silicide (NiSi); and

removing a portion of said nickel film which was not turned into said nickel silicide, by etching,

wherein said nickel film has such a thickness t 1 above a p-channel device that, when poly-silicon and nickel react with each other to make nickel silicide, said nickel silicide has Ni 3 Si phase as a principal constituent, and has such a thickness t 2 above a n-channel device that, when poly-silicon and nickel react with each other to make nickel silicide, said nickel silicide has one of NiSi phase and NiSi 2 phase as a principal constituent.

33. The method as set forth in claim 32 , wherein a ratio of a thickness T Ni of said nickel film to a thickness T Si of said poly-silicon is defined as T Ni /T Si ≧1.60 to form said gate electrode including Ni 3 Si phase as a principal constituent.

34. The method as set forth in claim 32 , wherein a ratio of a thickness T Ni of said nickel film to a thickness T Si of said poly-silicon is defined as 0.55≦T Ni /T Si ≦0.95 to form said gate electrode including NiSi phase as a principal constituent.

35. The method as set forth in claim 32 , wherein a ratio of a thickness T Ni of said nickel film to a thickness T Si of said poly-silicon is defined as 0.28≦T Ni /T Si ≦0.54, and said gate electrode and said nickel film are thermally annealed at 650 degrees centigrade or higher to form said gate electrode including NiSi 2 phase as a principal constituent.

36. A method of fabricating a semiconductor device, comprising:

depositing poly-silicon on a gate insulating film and patterning said poly-silicon into a gate electrode having desired dimension;

forming a nickel (Ni) film on said gate electrode;

thermally annealing said gate electrode and said nickel film to entirely turn said gate electrode to nickel silicide (NiSi); and

removing a portion of said nickel film which was not turned into said nickel silicide, by etching,

wherein a ratio of a thickness T Ni of said nickel film to a thickness T Si of said poly-silicon is defined as 1.60≦T Ni /T Si .

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 12, 2013
From: NEC CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 030784/0197 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 14, 2006
From: TAKAHASHI, KENSUKE; MANABE, KENZO; IKARASHI, NOBUYUKI; TATSUMI, TORU
To: NEC CORPORATION
Reel/Frame 017806/0308 →