Fast analogue-to-digital converter
The invention relates to fast analogue-to-digital converters having differential inputs and a parallel structure, comprising at least one network of N series resistors with value r and one network of N comparators. The series resistor network receives a reference voltage and is traversed by a fixed current I o and the row i (i varying from 1 to N) comparator essentially comprises a dual differential amplifier with four inputs; two inputs receive a differential voltage VS−VN to be converted, a third being connected to a row i resistor of the network, and a fourth input being connected to an N-i row resistor of the network. The resistor network is supplied by a variable reference voltage originating from a servoloop circuit which locks the voltage level of the middle of the resistor network at a voltage equal to the common mode voltage (VS−VSN)/2 present at the output of the sample-and-hold module.
1. An analogue-to-digital converter having differential inputs and a parallel structure, comprising at least one network of N series resistors with value r and one network of N comparators wherein:
the series resistor network receives a reference voltage and is traversed by a fixed current I o ;
the row i, i varying from 1 to N, comparator comprises:
a dual differential amplifier with four inputs, two inputs receiving a differential voltage to be converted, said differential voltage provided by a sample-and-hold module,
a third input being connected to a row i resistor of the network, and a fourth input being connected to an N-i row resistor of the network, the dual differential amplifier supplying a voltage representing a difference of the form (VS−VSN)−(N−2 i )r.I o , and the comparator switching in one direction or the other depending on the level of the voltage and on the row i of the comparator when said difference changes sign, and
wherein the resistor network is supplied by a variable reference voltage originating from a servoloop circuit which locks the voltage level of the middle of the resistor network at a voltage equal to the common mode voltage (VS−VSN)/2 present at the output of the sample-and-hold module, said servoloop circuit comprising an amplifier having an input connected to a mid-point of the resistor network.
2. The converter as claimed in claim 1 , wherein the dual differential amplifier with four inputs is composed of two single differential amplifiers, the outputs of which are connected in parallel, each of them receiving, on the one hand, one of the two input differential voltages and, on the other hand, one of the two voltages originating from the resistor network.
3. An analogue-to-digital converter having differential inputs and a parallel structure, comprising at least a first network of N series resistors with value r and one network of N comparators, wherein
the first resistor network receives a reference voltage (VH) and is traversed by a fixed current l o ;
the row i (i varying from 1 to N) comparator essentially comprises
a dual differential amplifier with four inputs, two inputs receiving a differential voltage VS-VN to be converted, said differential voltage provided by a sample-and-hold module,
a third input being connected to a row i resistor of the network, and
a fourth input being connected to an N-i row resistor of the network, the dual differential amplifier supplying a voltage representing a difference of the form (VS-VSN) - (N-2i)r.l 0 , and the comparator switching in one direction or the other depending on the level of the voltage VS-VSN and on the row i of the comparator when said difference changes sign, and
wherein the first resistor network is supplied by a variable reference voltage originating from a servoloop circuit which locks the voltage level of the middle of the resistor network at a voltage equal to the common mode voltage (VS-VSN)/ 2 present at the output of the sample-and-hold module, said servoloop circuit comprising an amplifier having an input connected to a mid-point of another resistor network similar to the first, the second network also receiving said variable reference voltage from the servoloop circuit.
4. The converter as claimed in claim 3 , wherein the dual differential amplifier with four inputs is composed of two single differential amplifiers, the outputs of which are connected in parallel, each of them receiving, on the one hand, one of the two input differential voltages and, on the other hand, one of the two voltages originating from the first resistor network.