IP Library Granted Patent US 7,767,020
Granted Patent B2
US 7,767,020 · App. 10/589,587 · Granted Aug 3, 2010

Method for manufacturing single crystal semiconductor

Assignee: Sumco Techxiv Corporation
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Quick Facts
Patent No.
US 7,767,020
App. No.
10/589,587
Granted
Aug 3, 2010
Kind
B2
Abstract

A method for manufacturing a single crystal semiconductor, in which, in a process of pulling up the single crystal semiconductor from melt for growing it, an impurity is incorporated more uniformly into the single crystal semiconductor so that a variation in impurity concentration across the semiconductor wafer surface can be reduced, and thus, the planarity of the wafer can be improved. In the process of pulling-up the single crystal semiconductor ( 6 ), fluctuation in a pulling-up speed is controlled, whereby the variation in concentration of the impurity in the single crystal semiconductor ( 6 ) is reduced. Especially, a width of speed fluctuation (ΔV) in 10 seconds is adjusted to less than 0.025 mm/min. Furthermore, in carrying out the control for adjusting the pulling-up speed such that a diameter of the single crystal semiconductor ( 6 ) becomes a desired diameter, a magnetic field having strength of 1,500 gauss or more is applied to the melt ( 5 ).

Claims (14)

1. A method for manufacturing a single crystal semiconductor, in which a seed crystal is dipped into melt in a crucible and is pulled up at a pulling-up speed corresponding to a pulling-up instruction to manufacture the single crystal semiconductor having an impurity added thereto, including the steps of:

determining a deviation between a target value of a crystal diameter and a current value of the crystal diameter,

controlling the amount of increase/decrease in speed from a current pulling-up speed to make the amount of the pulling-up instruction for making the deviation of the crystal diameter zero and setting a limit to a range of the pulling-up speed such that a pulling-up speed fluctuation in 10 seconds is less than 0.025 mm/min, and,

outputting the pulling-up instruction to a pulling up mechanism to increase/decrease the pulling-up speed by the controlled amount of increase/decrease in speed from the current pulling-up speed, and pulling up the single crystal semiconductor.

2. The method for manufacturing the single crystal semiconductor of claim 1 , wherein,

when the single crystal semiconductor is pulled up, a magnetic field of 1500 gauss or above is applied to the melt.

3. The method for manufacturing the single crystal semiconductor of claim 1 , wherein

the impurity to be added into the single crystal semiconductor is boron B or gallium Ga, and the impurity concentration is 8.0e17 atoms/cc or more.

4. The method for manufacturing the single crystal semiconductor of claim 1 , wherein

the impurity to be added into the single crystal semiconductor is phosphorus P, antimony Sb, or arsenic As, and the impurity concentration is 5.0e17 atoms/cc or more.

5. The method for manufacturing the single crystal semiconductor of claim 1 , wherein

The current value of the crystal diameter is determined by the weight of the crystal.

6. The method for manufacturing the single crystal semiconductor claim 1 , wherein

The current value of the crystal diameter is determined by optical method.

Assignments (2)
CHANGE OF NAME Recorded Jun 7, 2010
From: KOMATSU DENSHI KINZOKU KABUSHIKI KAISHA
To: SUMCO TECHXIV CORPORATION
Reel/Frame 024493/0570 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 16, 2006
From: INAGAKI, HIROSHI; HONMA, MASANORI; KAWASHIMA, SHIGEKI; SHIBATA, MASAHIRO
To: KOMATSU DENSHI KINZOKU KABUSHIKI KAISHA
Reel/Frame 018198/0262 →
Priority Claims (1)
JP 2004-043218 · Feb 19, 2004 · national
Continuity (1)
Related Publication 20070193500A1 · Aug 23, 2007