IP Library Granted Patent US 7,320,928
Granted Patent B2
US 7,320,928 · App. 10/600,203 · Granted Jan 22, 2008

Method of forming a stacked device filler

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Quick Facts
Patent No.
US 7,320,928
App. No.
10/600,203
Granted
Jan 22, 2008
Kind
B2
Abstract

Numerous embodiments of a stacked device filler and a method of formation are disclosed. In one embodiment, a method of forming a stacked device filler comprises forming a material layer between two or more substrates of a stacked device, and causing a reaction in at least a portion of the material, wherein the reaction may comprise polymerization, and the material layer may be one or a combination of materials, such as nonconductive polymer materials, for example.

Claims (27)

1. A method of forming a stacked semiconductor device, comprising:

forming a layer of material on a portion of a top surface of a substrate, the substrate having an interconnect structure formed thereon;

selectively removing a portion of the layer of material to expose a portion of a top surface of the interconnect structure;

combining the substrate with another substrate to form a stacked semiconductor device;

causing a reaction in a portion of the layer of material wherein a portion of the area between the two substrates is filled with a polymer foam as a product of the reaction.

2. The method of claim 1 , wherein the reaction comprises polymerization.

3. The method of claim 1 , wherein the forming comprises spin coating.

4. The method of claim 3 , wherein the layer of material is spin-coated to a thickness greater than the top surface of the interconnect structure.

5. The method of claim 1 , wherein the selective removing comprises one or more of: chemical etch, dry etch, or mechanical etch.

6. The method of claim 1 , wherein the layer material is selected from the group consisting of: water, hydroxyl end-capped oligomers, and carboxylic acid end-capped polymers.

7. A method comprising:

forming a layer of material on a substrate including an interconnect structure formed thereon;

removing a portion of the layer of material such that a top surface of the layer of material is lower than a top surface of the interconnect structure to expose the top surface of the interconnect structure;

combining the substrate with another substrate; and

filling an area between the two substrates with a polymer foam as a product of a reaction in the layer of material.

8. The method of claim 7 , wherein the reaction in the layer of material comprises polymerization.

9. The method of claim 7 , wherein forming the layer of material comprises forming the layer of material to a thickness greater than the top surface of the interconnect structure.

10. The method of claim 7 , wherein the layer material is selected from the group consisting of water, hydroxyl end-capped oligomers, and carboxylic acid end-capped polymers.

11. A method of forming stacked wafers, comprising:

providing a first wafer having a first conductive interconnect structure and a first layer thereon, wherein at least a portion of the first conductive interconnect is exposed;

providing a second wafer having a second conductive interconnect structure and a second layer thereon, wherein at least a portion of the second conductive interconnect structure is exposed;

bonding the first conductive interconnect structure to the second conductive interconnect structure; and

chemically reacting the first layer with the second layer by introduction of one of a reactant, heat or a gas to form a foam filling in an area between the first and second wafers adjacent to the first and second conductive interconnect structures.

12. The method of claim 11 , further comprising:

thinning at least one of the first and second wafers, the foam providing structural support to the stacked wafers during the thinning.

13. The method of claim 11 , further comprising:

protecting the first and second interconnect structures from oxidation using the foam during a subsequent wafer process.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 15, 2022
From: INTEL CORPORATION
To: TAHOE RESEARCH, LTD.
Reel/Frame 061175/0176 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 20, 2003
From: KLOSTER, GRANT M.; STAINTES, DAVID; RAMANATHAN, SHRIRAM
To: INTEL CORPORATION
Reel/Frame 014222/0986 →