Method and apparatus for integrated circuit self-description
View Patent ↗An integrated circuit includes a self-description data store that stores a self-description of at least a portion of the integrated circuit device. The self-description includes at least some connectivity information indicating a structure of the integrated circuit device. The integrated circuit self-description may be referred to as a circuit netlist attachment or CNA.
1. An apparatus comprising:
an integrated circuit including
a self-description data store storing a self-description of at least a part of the integrated circuit, the self-description including at least some connectivity information indicating a structure of the part of the integrated circuit, the self-description to be in a form to be used for one of debugging, simulation and analysis of the at least part of the integrated circuit after manufacture of the integrated circuit.
2. The apparatus of claim 1 wherein
the self-description data store is part of a microcode read-only memory (ROM).
3. The apparatus of claim 1 further comprising
an externally-accessible circuit, the self-description being accessible via the externally-accessible circuit.
4. The apparatus of claim 3 wherein the externally-accessible circuit is one of a test access port and a scan chain.
5. The apparatus of claim 1 wherein the self-description is encrypted.
6. The apparatus of claim 1 wherein the self-description is compressed.
7. The apparatus of claim 6 wherein the self-description includes a self-description of the self-description.
8. The apparatus of claim 6 further including one of a redundant self-description and a ones complement of the self-description.
9. An apparatus comprising:
a microcode read-only memory (ROM) provided on an integrated circuit; and
a circuit netlist attachment (CNA) stored in a portion of the microcode ROM, the CNA including at least some structural and connectivity information associated with the integrated circuit, the CNA to be in a form to be used for one of debugging, simulation and analysis of at least part of the integrated circuit after manufacture of the integrated circuit.
10. The apparatus of claim 9 wherein the CNA is encrypted prior to storage on the integrated circuit.
11. The apparatus of claim 10 wherein the CNA is compressed prior to storage on the integrated circuit.
12. The apparatus of claim 9 wherein the integrated circuit is a microprocessor.
13. The apparatus of claim 9 wherein the integrated circuit further stores a key to decrypt a CNA of another integrated circuit.
14. An apparatus comprising:
a circuit netlist attachment encoder module to provide a circuit netlist attachment (CNA) in response to receiving input data including at least some connectivity information associated with an integrated circuit; and
an output to provide the CNA to be stored on the integrated circuit, the CNA to be in a form to be used for one of debugging, simulation and analysis of at least part of the integrated circuit after manufacture of the integrated circuit.
15. The apparatus of claim 14 further comprising:
a compression module to compress the CNA prior to the CNA being stored on the integrated circuit.
16. The apparatus of claim 14 further comprising:
an encryption module to encrypt the CNA prior to the CNA being stored on the integrated circuit.
17. The apparatus of claim 16 further comprising:
a CNA decode module to provide a decoded CNA in response to receiving the CNA from the integrated circuit, the decoded CNA being in a form to be used to analyze the integrated circuit.
18. The apparatus of claim 17 further comprising:
a decryption module to decrypt the CNA.
19. A method comprising:
receiving input data associated with an integrated circuit, the input data including at least some connectivity information associated with the integrated circuit; and
providing a circuit netlist attachment (CNA) describing at least a portion of the integrated circuit in response to receiving the input data, the circuit netlist attachment to be stored on the integrated circuit, the CNA to be in a form to be used for one of debugging, simulation and analysis of the at least a portion of the integrated circuit after manufacture of the integrated circuit.
20. The method of claim 19 further comprising:
one or more of encrypting and compressing the circuit netlist attachment (CNA) prior to storing the CNA on the integrated circuit.
21. The method of claim 19 further comprising:
storing the circuit netlist attachment on the integrated circuit.
22. The method of claim 21 wherein storing comprises one of storing at least two copies of the CNA to provide a redundant copy and storing a first copy of the CNA and a ones complement of the CNA on the integrated circuit.
23. The method of claim 19 wherein providing the CNA includes providing a CNA that includes a reference to itself.
24. The method of claim 19 wherein providing the circuit netlist attachment comprises providing the circuit netlist attachment via an externally-accessible circuit on the integrated circuit.
25. The method of claim 19 wherein providing the circuit netlist attachment comprises providing the circuit netlist attachment via one of a scan chain, a test access port and a read-only memory (ROM) dump circuit.
26. The method of claim 19 further comprising:
providing the circuit netlist attachment to be used by a routing tool to be used in determining a routing on a board between the integrated circuit and another integrated circuit.