Circuit for controlling the performance of an integrated circuit
View Patent ↗A system and method for utilizing a feedback-based delay stabilization and power optimization circuit. One embodiment of the present invention is directed to an electronic circuit comprising an indicator operable to generate an indicator signal that is proportional to an actual operating speed of an integrated circuit that includes the indicator; and a comparator operable to compare the indicator signal to a reference signal and to generate from the comparison an error signal that is proportional to a difference between the operating speed and a desired operating speed. A signal combining circuit may then generate a feedback signal for a power supply based upon the error signal and an output signal of the power supply.
1. An operating-speed control circuit, comprising:
an indicator circuit operable to generate an indicator signal that is proportional to an actual operating speed at which signals propagate through an integrated circuit that includes the indicator;
a comparator operable to compare the indicator signal to a reference signal and to generate from the comparison an error signal that is proportional to a difference between the actual operating speed and a desired operating speed; and
a feedback circuit for a power supply that is operable to control the power supply based on a combination of the error signal and a signal from the power supply.
2. The circuit of claim 1 , wherein the indicator circuit comprises a ring oscillator operable to oscillate at a frequency that is proportional to the operating speed of the integrated circuit.
3. The circuit of claim 1 wherein the indicator circuit comprises a temperature-sensitive circuit operable to generate a voltage signal that is proportional to the operating speed of the integrated circuit.
4. The circuit of claim 1 wherein the comparator comprises a phase-frequency detector operable to compare a frequency of the indicator signal to a frequency of the reference signal to generate the error signal.
5. The circuit of claim 4 , further comprising a biasing circuit coupled with the comparator and operable to bias the error signal.
6. The circuit of claim 5 , further comprising a combining circuit operable to combine the error signal with a power-supply signal to generate a feedback signal.
7. The circuit of claim 6 , further comprising a clamping circuit coupled to the combining circuit and operable to limit the magnitude of the feedback signal.
8. The circuit of claim 7 wherein the clamping circuit comprises:
an analog-to-digital converter operable to convert the feedback signal into a digital signal and to limit the digital signal to within a predetermined range; and
a digital-to-analog converter operable to convert the digital signal into a limited analog feedback signal.
9. The circuit of claim 1 , further comprising a low-pass filter coupled to the comparator and operable to filter the error signal.
10. A power-supply control circuit comprising:
a detector operable to generate a detector signal having a frequency that is proportional to the speed at which an integrated circuit that incorporates the detector is operating;
a comparator coupled to the detector and operable to compare the frequency of the detector signal to the frequency of a reference signal and to generate an error signal based upon the difference between the frequency of the detector signal and the frequency of the reference signal; and
a signal-combining circuit operable to generate a feedback signal for a power supply from the error signal and a voltage from the power supply.
11. An electronic system comprising:
a power supply operable to generate a supply signal;
an integrated circuit coupled to the power supply;
an indicator operable to generate an indicator signal that is proportional to an actual operating speed at which signals propagate through integrated circuit;
a comparator coupled to the power supply and to the indicator and operable to compare the indicator signal to a reference signal to generate from the comparison an error signal that is proportional to a difference between the actual operating speed and a desired operating speed, and to control the power supply with the error signal; and
a feedback circuit for the power supply that is operable to control the power supply based on a combination of the error signal and a signal from the power supply.
12. The electronic system of claim 11 , further comprising a reference clock coupled to the integrated circuit and operable to generate the reference signal.
13. The electronic system of claim 11 , further comprising a frequency divider coupled between the reference clock and the comparator and operable to generate from the reference signal an intermediate reference signal having a predetermined frequency.
14. The electronic system of claim 11 , further comprising:
a second integrated circuit coupled to the power supply;
a second indicator operable to generate a second indicator signal that is proportional to an actual operating speed of the second integrated circuit; and
a second comparator coupled to the power supply and to the second indicator and operable to compare the second indicator signal to a reference signal to generate from the comparison a second error signal that is proportional to a difference between the operating speed of the second integrated circuit and a desired operating speed, and to control the power supply with the second error signal.
15. A method, comprising:
determining a difference between an actual operating speed in which a signal propagates through an integrated circuit and a desired operating speed of the signal; and
generating an error signal based on the determined difference; and
forcing the actual operating speed of the signal toward the desired operating speed based on the determined difference after combining the error signal with a power supply signal.
16. The method of claim 15 wherein determining the difference comprises comparing a frequency corresponding to the actual operating speed to a frequency corresponding to the desired operating speed.
17. The method of claim 15 wherein the forcing comprises adjusting the voltage of a power supply that is supplying voltage to the integrated circuit.
18. A method, comprising:
determining a difference between a frequency of an indicator signal generated on an integrated circuit and a reference frequency
generating an error signal based on the determined difference; and
adjusting a voltage supplied to the integrated circuit based upon a combination of the error signal and a voltage signal.
19. The method of claim 18 wherein adjusting the voltage comprises:
decreasing the voltage when the frequency of the indicator signal is higher than the reference frequency; and
increasing the voltage when the frequency of the indicator signal is lower than the reference frequency.
20. The method of claim 18 wherein adjusting comprises maintaining the voltage within a predetermined range when the difference is outside of a second predetermined range.