IP Library Granted Patent US 6,917,547
Granted Patent B2
US 6,917,547 · App. 10/616,955 · Granted Jul 12, 2005

Non-volatile semiconductor memory device

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 6,917,547
App. No.
10/616,955
Granted
Jul 12, 2005
Kind
B2
Abstract

When a non-volatile memory write error occurs in a card storage device containing a non-volatile memory and an error correction circuit, write data is read from the non-volatile memory and a check is made if the error can be corrected by the error correction circuit. If the error can be corrected, the write operation is ended. If the error correction circuit cannot correct the error, substitute processing is performed to write data into some other area.

Claims (21)

1. A non-volatile memory comprising:

a plurality of nonvolatile memory cells; and an error correcting circuit,

wherein a program command accompanied with address information and first data are received from outside,

wherein, in a program operation executed in response to said program command, first nonvolatile memory cells of said plurality of nonvolatile memory cells are selected in accordance with said address information and programmed with said first data,

wherein, after said first nonvolatile memory cells are programmed with said first data in said program operation, second nonvolatile memory cells of said plurality of nonvolatile memory cells are selected and second data stored therein are read out,

wherein said error correcting circuit judges whether said second data includes one or more errors and corrects said second data to create third data when said second data includes one or more errors, and

wherein said second nonvolatile memory cells are programmed with said third data after said second data is corrected by said error correcting circuit.

2. A nonvolatile memory according to claim 1 , wherein, after said first data is programmed and before said second nonvolatile memory cells are selected:

said first nonvolatile memory cells are selected and fourth data stored therein is read out,

said error correcting circuit judges whether said fourth data includes errors which are correctable or not correctable,

said first nonvolatile memory cells are programmed again with said first data, if said fourth data includes errors which are not correctable by said error correcting circuit, and

programming of said first nonvolatile memory cells with said first data is completed if said fourth data includes errors which are correctable by said error correcting circuit.

3. A nonvolatile memory according to claim 2 , wherein after said first data is programmed:

said error correcting circuit judges whether said fourth data includes errors which are correctable or not correctable, and

when said error correcting judges that said fourth data includes errors which are not correctable, third nonvolatile memory cells of said plurality of nonvolatile memory cells, different from said first nonvolatile memory cells, are selected and programmed with said first data.

4. A nonvolatile memory according to claim 3 , further comprising a controller including said error correcting circuit.

5. A nonvolatile memory according to claim 4 , wherein:

said controller further includes a buffer memory, and

said first data is stored in said buffer memory until completion of programming with said first data.

6. A nonvolatile memory according to claim 1 , wherein each of said plurality of nonvolatile memory cells is a one-bit memory cell.

7. A nonvolatile memory according to claim 1 , wherein each of said plurality of nonvolatile memory cells is a multiple-bit memory cell.

Assignments (5)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 9, 2014
From: HITACHI ULSI SYSTEMS CO., LTD.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 032859/0252 →
MERGER Recorded Jun 10, 2011
From: RENESAS TECHNOLOGY CORP.
To: NEC ELECTRONICS CORPORATION
Reel/Frame 026467/0252 →
CHANGE OF NAME Recorded Jun 10, 2011
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 026467/0279 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 11, 2003
From: HITACHI, LTD.
To: RENESAS TECHNOLOGY CORPORATION
Reel/Frame 014190/0088 →