IP Library Granted Patent US 6,913,995
Granted Patent B2
US 6,913,995 · App. 10/618,988 · Granted Jul 5, 2005

Method of forming a barrier metal in a semiconductor device

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Quick Facts
Patent No.
US 6,913,995
App. No.
10/618,988
Granted
Jul 5, 2005
Kind
B2
Abstract

Disclosed is a method of forming a barrier metal in the semiconductor device. The method comprises the steps of a) patterning a porous film on a base layer to form a via hole, b) depositing a CVD TiN film on the entire structure including the via hole, c) implementing a plasma treatment process using N 2 +H 2 , d) repeatedly implementing the steps (b) and (c) in order to bury only the pores formed on the surface of the porous film with CVD TiN, and e) forming a barrier metal on the entire structure including the via hole. Therefore, the present invention can prevent introduction of the conductive material into the base layer in a subsequent process.

Claims (12)

1. A method of forming a barrier metal in a semiconductor device, comprising the steps of:

a) patterning a porous film on a base layer to form a via hole through the porous film to expose at least part of the base film, the porous film comprising exposed pores on an exposed sidewall surface of the porous film;

b) depositing a thin CVD TiN film on the entire structure including the via hole;

c) implementing a plasma treatment process using N 2 +H 2 ;

d) repeatedly implementing the steps (b) and (c) in order to bury only the exposed pores formed on the exposed sidewall surface of the porous film with CVD TiN leaving a remaining exposed sidewall surface of the porous film substantially uncovered by CVD TiN; and

e) forming a barrier metal on the entire structure including the via hole.

2. The method as claimed in claim 1 , wherein the CVD TiN film is formed in thickness of 10˜20 Å.

3. A method of forming a barrier metal in a semiconductor device, comprising the steps of:

a) patterning a porous film on a base layer to form a via hole through the porous film to expose at least part of the base film, the via hole being defined by at least one sidewall of the porous film, the sidewall comprising exposed pores;

b) repeatedly implementing a process of depositing a thin MOTiN film and a plasma treatment process so that exposed pores at the sidewall are buried by one or more MOTiN films leaving a remaining surface area of the sidewall that is free of exposed pores substantially free of MOTiN; and

c) forming a barrier metal on the entire structure including the via hole.

4. The method as claimed in claim 3 , wherein the one or more MOTiN films are formed in a total thickness of 10˜20 Å.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 12, 2009
From: CROSSTEK CAPITAL, LLC
To: CHUNG CHENG HOLDINGS, LLC
Reel/Frame 023085/0877 →
PARTIAL RELEASE OF SECURITY INTEREST Recorded Aug 10, 2009
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL TRUSTEE
To: MAGNACHIP SEMICONDUCTOR, LTD.
Reel/Frame 023075/0054 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 30, 2009
From: MAGNACHIP SEMICONDUCTOR, LTD.
To: CROSSTEK CAPITAL, LLC
Reel/Frame 022764/0270 →
AFTER-ACQUIRED INTELLECTUAL PROPERTY KUN-PLEDGE AGREEMENT Recorded Feb 18, 2009
From: MAGNACHIP SEMICONDUCTOR, LTD.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL TRUSTEE
Reel/Frame 022277/0133 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 10, 2005
From: HYNIX SEMICONDUCTOR, INC.
To: MAGNACHIP SEMICONDUCTOR, LTD.
Reel/Frame 016216/0649 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 20, 2003
From: KO, CHANG JIN
To: HYNIX SEMICONDUCTOR INC.
Reel/Frame 014600/0559 →