Patent Assignment
Reel/Frame 023085/0877
Assignment of Assignor's Interest
Recorded: 2009-08-12
Received: 2009-08-12
Pages: 17
Assignor
CROSSTEK CAPITAL, LLC
Executed: 2009-08-12
Assignee
CHUNG CHENG HOLDINGS, LLC
2711 CENTERVILLE ROAD, SUITE 400, WILMINGTON, DE, 19808, UNITED STATES
Covered Properties
(30)
DRAM cell having MOS capacitor
Application:
11/265,852 →
Method for Forming Metal Wire in Semiconductor Device
Application:
10/878,316 →
Method for Forming Inductor in Semiconductor Device
Application:
10/876,728 →
Method for manufacturing a bipolar transistor using a CMOS process
Application:
10/801,407 →
Mask set for measuring an overlapping error and method of measuring an overlapping error using the same
Application:
10/793,743 →
Method of Forming Metal Line in Semiconductor Device Including Forming First and Second Zirconium Films
Application:
10/744,494 →
Dram Cell Having Mos Capacitor and Method for Manufacturing the Same
Application:
10/737,052 →
Chemical Mechanical Polishing Apparatus
Application:
10/720,415 →
Method for Fabricating Capacitor in Semiconductor Device
Application:
10/705,096 →
Method of Forming a Barrier Metal in a Semiconductor Device
Application:
10/618,988 →
Method for Forming Semiconductor Device
Application:
10/615,045 →
Method of Forming an Isolation Film in a Semiconductor Device
Application:
10/612,074 →
Method for Manufacturing Merged Dram with Logic Device
Application:
10/610,248 →
Semiconductor Device with Stacked Memory and Logic Substrates and Method for Fabricating the Same
Application:
10/443,365 →
Method for Manufacturing Capacitor
Application:
10/331,514 →
Method of Forming Copper Wire on Semiconductor Device
Application:
10/331,428 →
Method for Fabricating Cmos Transistor of a Semiconductor Device
Application:
10/331,529 →
Method for Fabricating Semiconductor Device
Application:
10/318,158 →
Method for Fabricating Magnetic Field Sensor
Application:
10/316,783 →
Semiconductor Device Fabricated on Multiple Substrate
Application:
10/158,119 →
Method for Cleaning the Contact Area of a Metal Line
Application:
10/119,809 →
Method for Forming Metal Line of Al/Cu Structure
Application:
10/096,958 →
Method for Forming Dual Damascene Line Structure
Application:
10/062,716 →
Method for Minimizing Variation in Etch Rate of Semiconductor Wafer Caused by Variation in Mask Pattern Density
Application:
10/040,490 →
Metal Layer in Semiconductor Device Including a Planar Stuffed Layer and an Insulating Film with a Projection
Application:
09/987,743 →
Semiconductor Device Fabricated on Multiple Substrates and Method for Fabricating the Same
Application:
09/977,249 →
Integrated Circuit with Silicided Esd Protection Transistors
Application:
09/949,040 →
Semiconductor Device with Stacked Memory and Logic Substrates and Method for Fabricating the Same
Application:
09/916,961 →
Semiconductor Device and Method of Fabricating the Same
Application:
09/892,442 →
Mosfet and Fabrication Method Thereof
Application:
09/871,711 →