Method for forming metal wire in semiconductor device
View Patent ↗The present invention relates to a method for forming a metal wire in a semiconductor device. The method comprises the steps of forming a lower metal wire on a semiconductor substrate, depositing an insulating film on the lower metal wire, forming a damascene etch pattern in the insulating film, depositing a conductive material on the insulating film so that the conductive material fills the damascene etch pattern, thus forming a conductive layer including step portions, depositing, on the conductive layer, a material having a high etch selective ratio against the conductive material, thus forming an anti-etch film, stripping a part of the anti-etch film by means of a CMP process until the conductive layer is exposed, striping a portion of the conductive layer by means of an etch process using the anti-etch film as an etch mask, and stripping the remaining anti-etch film and conductive layer by means of a CMP process, thus forming a conductive wire with which the damascene etch pattern is filled. Therefore, a large amount of slurry and the usage of a pad depending on a long-time polishing in a CMP process can be reduced. It is thus possible to save a process cost price in development and production of a semiconductor device.
1. A method for forming a metal wire in a semiconductor device, comprising the steps of:
forming a lower metal wire on a semiconductor substrate;
depositing an insulating film on the lower metal wire;
forming a damascene etch pattern in the insulating film;
depositing a conductive material on the insulating film so that the conductive material fills the damascene etch pattern, thus forming a conductive layer including step portions;
depositing, on an entire top surface of the conductive layer, a material having a high etch selective ratio against the conductive material, thereby forming an anti-etch film;
stripping a part of the anti-etch film by means of a chemical mechanical polishing (CMP) process until the conductive layer is exposed;
stripping a portion of the conductive layer by means of an etch process using the anti-etch film as an etch mask; and
stripping the remaining anti-etch film and conductive layer by means of a CMP process, thereby forming a conductive wire with which the damascene etch pattern is filled.
2. The method as claimed in claim 1 , wherein the anti-etch film is tantalum.
3. The method as claimed in claim 2 , wherein in the CMP process for stripping the anti-etch film, slurry for striping tantalum is used.
4. The method as claimed in claim 1 , wherein the deposition thickness of the conductive layer is the same as the depth of the damascene etch pattern.
5. The method as claimed in claim 4 , wherein the anti-etch film is composed of an insulating film such as a SiO 2 film or a SiN film.
6. The method as claimed in claim 5 , wherein in the CMP process for stripping the anti-etch film, slurry for polishing an insulating film is used.
7. The method as claimed in claim 4 , wherein before the conductive material is deposited on the insulating film, an anti-diffusion barrier film is formed, and the conductive film located at the top of the barrier film except for the conductive film located at the top of the anti-etch film is stripped by means of the etch process.
8. The method as claimed in claim 7 , wherein the barrier film on the insulating film that is exposed by stripping the conductive film through the etch process is stripped by means of a spin etching using chemicals having a high etch selective ratio against the conductive material.