IP Library Granted Patent US 7,001,779
Granted Patent B2
US 7,001,779 · App. 10/622,295 · Granted Feb 21, 2006

Methods of forming semiconductor constructions

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,001,779
App. No.
10/622,295
Granted
Feb 21, 2006
Kind
B2
Abstract

The invention includes a method of forming a semiconductor construction, such as an MRAM construction. A block is formed over a semiconductor substrate. First and second layers are formed over the block, and over a region of the substrate proximate the block. The first and second layers are removed from over the block while leaving portions of the first and second layers over the region proximate the block. At least some of the first layer is removed from under the second layer to form a channel over the region proximate the block. A material, such as a soft magnetic material, is provided within the channel. The invention also includes semiconductor constructions.

Claims (56)

1. A method of forming a semiconductor construction, comprising:

forming a mass over a semiconductor substrate, the mass comprising a memory bit which includes a first magnetic layer, a second magnetic layer, and a non-magnetic layer between the first and second magnetic layers;

forming first and second layers over the mass, and over a region of the substrate proximate the mass;

removing the first and second layers from over the mass while leaving portions of the first and second layers over the region proximate the mass;

etching the first layer with an etch selective for the first layer relative to the second layer to remove at least some of the first layer from under the second layer and thereby form a channel over the region proximate the mass; and

forming a material within the channel.

2. The method of claim 1 wherein the removing the first and second layers from over the mass comprises chemical-mechanical polishing of the first and second layers.

3. The method of claim 1 wherein the first layer comprises silicon dioxide and the second layer comprises silicon nitride.

4. The method of claim 1 wherein the first layer comprises silicon nitride and the second layer comprises silicon dioxide.

5. The method of claim 1 wherein the second layer comprises silicon carbide and the first layer does not comprise silicon carbide.

6. The method of claim 1 wherein the second layer consists essentially of one or both of silicon and carbon; and wherein the first layer consists essentially of silicon and one or both of nitrogen and oxygen.

7. The method of claim 1 wherein the second layer consists essentially of silicon and one or both of nitrogen and oxygen; and wherein the first layer comprises carbon.

8. The method of claim 1 wherein the material formed within the channel is a soft magnetic material comprising one or more of nickel, iron and copper.

9. The method of claim 1 wherein the material formed within the channel consists essentially of mu-metal.

10. A method of forming a semiconductor construction, comprising:

forming a mass over a semiconductor substrate;

forming first and second layers over the mass, and over a region of the substrate proximate the mass;

removing the first and second layers from over the mass while leaving portions of the first and second layers over the region proximate the mass, the removing of the first and second layers from over the mass comprising chemical-mechanical polishing of the first and second layers;

etching the first layer with an etch selective for the first layer relative to the second layer to remove at least some of the first layer from under the second layer and thereby form a channel over the region proximate the mass; and

forming a material within the channel.

11. A method of forming a semiconductor construction, comprising:

forming a mass over a semiconductor substrate;

forming first and second layers over the mass, and over a region of the substrate proximate the mass; the first layer comprising silicon nitride and the second layer comprising silicon dioxide;

removing the first and second layers from over the mass while leaving portions of the first and second layers over the region proximate the mass;

etching the first layer with an etch selective for the first layer relative to the second layer to remove at least some of the first layer from under the second layer and thereby form a channel over the region proximate the mass; and

forming a material within the channel.

12. A method of forming a semiconductor construction, comprising:

forming a mass over a semiconductor substrate;

forming first and second layers over the mass, and over a region of the substrate proximate the mass; the second layer comprising silicon carbide and the first layer not comprising silicon carbide;

removing the first and second layers from over the mass while leaving portions of the first and second layers over the region proximate the mass;

etching the first layer with an etch selective for the first layer relative to the second layer to remove at least some of the first layer from under the second layer and thereby form a channel over the region proximate the mass; and

forming a material within the channel.

13. A method of forming a semiconductor construction, comprising:

forming a mass over a semiconductor substrate;

forming first and second layers over the mass, and over a region of the substrate proximate the mass; the second layer consisting essentially of one or both of silicon and carbon, and the first layer consisting essentially of silicon and one or both of nitrogen and oxygen;

removing the first and second layers from over the mass while leaving portions of the first and second layers over the region proximate the mass;

etching the first layer with an etch selective for the first layer relative to the second layer to remove at least some of the first layer from under the second layer and thereby form a channel over the region proximate the mass; and

forming a material within the channel.

14. A method of forming a semiconductor construction, comprising:

forming a mass over a semiconductor substrate;

forming first and second layers over the mass, and over a region of the substrate proximate the mass; the second layer consisting essentially of silicon and one or both of nitrogen and oxygen, and the first layer comprising carbon;

removing the first and second layers from over the mass while leaving portions of the first and second layers over the region proximate the mass;

etching the first layer with an etch selective for the first layer relative to the second layer to remove at least some of the first layer from under the second layer and thereby form a channel over the region proximate the mass; and

forming a material within the channel, the material comprising one or more of nickel, iron and copper.

15. A method of forming a semiconductor construction, comprising:

forming a mass over a semiconductor substrate;

forming first and second layers over the mass, and over a region of the substrate proximate the mass;

removing the first and second layers from over the mass while leaving portions of the first and second layers over the region proximate the mass;

etching the first layer with an etch selective for the first layer relative to the second layer to remove at least some of the first layer from under the second layer and thereby form a channel over the region proximate the mass; and

forming a material within the channel; said material being a soft magnetic material comprising one or more of nickel, iron and copper.

16. A method of forming a semiconductor construction, comprising:

forming a mass over a semiconductor substrate;

forming first and second layers over the mass, and over a region of the substrate proximate the mass;

removing the first and second layers from over the mass while leaving portions of the first and second layers over the region proximate the mass;

etching the first layer with an etch selective for the first layer relative to the second layer to remove at least some of the first layer from under the second layer and thereby form a channel over the region proximate the mass; and

forming a material within the channel; said material consisting essentially of mu-metal.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →