Semiconductor device including n-channel fets and p-channel fets with improved drain current characteristics
View Patent ↗In a semiconductor device including n-channel field-effect transistors and p-channel field-effect transistors, in which the channel direction is parallel to a axis, a semiconductor device in provided which has excellent drain current characteristics at both n-channel field-effect transistors and p-channel field-effect transistors. In a semiconductor device including n-channel field-effect transistors N 1 and N 2 and p-channel field-effect transistors P 1 and P 2 , a stress control film that covers the gate electrodes of the n-channel and p-channel field-effect transistors from upper surfaces thereof is not formed, or is made thin, above shallow trench isolations adjacent to active regions formed by the p-channel field-effect transistors P 1 and P 2 , in a case where the stress control film is a tensile film stress. Thus, improvement of the drain currents of both the n-channel and p-channel transistors can be expected. For this reason, it is possible to improve overall characteristics.
1. A semiconductor device including a semiconductor substrate, a gate electrode and a plurality of transistors formed on the semiconductor substrate, the plurality of transistors being disposed with a drain and a source corresponding to the gate electrode, an insulating film formed above the transistors, with a direction joining the source and the corresponding drain of the transistors being formed in a direction along a <100> crystal axis or an axis equivalent to the <100> crystal axis,
the transistors including a plurality of n-channel field-effect transistors and plurality of p-channel field-effect transistors,
the insulating film including tensile stress,
the insulating film that is formed in regions at the peripheries of the p-channel field-effect transistors and positioned in directions parallel and orthogonal to the direction joining the source and the drain including an insulating film that is thinner than the insulating film that is formed in regions at the peripheries of the n-channel field-effect transistors and positioned in directions parallel and orthogonal to the direction joining the source and the drain.
2. The semiconductor device of claim 1 , further including an interlayer insulating film including an upper end above the insulating film and a wiring layer above the interlayer insulating film.
3. A semiconductor device including a semiconductor substrate, a plurality of active regions enclosed by field regions formed on the semiconductor substrate, a gate electrode and a plurality of transistors formed on the active regions, the plurality of transistors being disposed with a drain and a source corresponding to the gate electrode, an insulating film formed above the transistors, with a direction joining the source and the corresponding drain of the transistors being formed in a direction along a <100> crystal axis or an axis equivalent to the <100> crystal axis,
the transistors including a plurality of n-channel field-effect transistors and a plurality of p-channel field-effect transistors corresponding to the n-channel field-effect transistors,
the insulating film including tensile stress,
wherein the insulating film that is thinner than the insulating film formed at regions positioned between the first n-channel field-effect transistors and the second n-channel field-effect transistors is formed on, or not disposed on, field regions adjacent to the active regions formed by the p-channel field-effect transistors.
4. A semiconductor device including n-channel field-effect transistors and p-channel field-effect transistors formed on a silicon substrate,
wherein the n-channel field-effect transistors and the p-channel field-effect transistors are plurally included,
a direction in which drain currents of the transistors mainly flow is a direction along a <100> crystal axis or an axis equivalent to the <100> crystal axis,
an insulating film including tensile stress is formed at upper portions of the n-channel field-effect transistors and the p-channel field-effect transistors, and
the insulating film that is thinner than the insulating film formed at regions positioned between first n-channel field-effect transistors and second n-channel field-effect transistors is formed on or not disposed on field regions adjacent the active regions of the p-channel field-effect transistors.
5. A semiconductor device including a semiconductor substrate, a gate electrode and a plurality of transistors formed on the semiconductor substrate, the plurality of transistors being disposed with a drain and a source corresponding to the gate electrode, an insulating film formed above the transistors, with a direction joining the source and the corresponding drain of the transistors being formed in a direction along a <100> crystal axis or an axis equivalent to the <100> crystal axis,
the transistors including a plurality of n-channel field-effect transistors and a plurality of p-channel field-effect transistors,
the insulating film including compression stress,
the insulating film that is formed in regions at the peripheries of the n-channel field-effect transistors and positioned in directions parallel and orthogonal to the direction joining the source and the drain including an insulating film that is thinner than the insulating film that is formed in regions at the peripheries of the p-channel field-effect transistors and positioned in directions parallel and orthogonal to the direction joining the source and the drain.
6. A semiconductor device including a semiconductor substrate, a plurality of active regions enclosed by field regions formed on the semiconductor substrate, a gate electrode and a plurality of transistors formed on the active regions, the plurality of transistors being disposed with a drain and a source corresponding to the gate electrode, an insulating film formed above the transistors, with a direction joining the source and the corresponding drain of the transistors being formed in a direction along a <100> crystal axis or an axis equivalent to the <100> crystal axis,
the transistors including a plurality of n-channel field-effect transistors and a plurality of p-channel field-effect transistors,
the insulating film including compression stress,
wherein the insulating film that is thinner than the insulating film formed at regions positioned between first p-channel field-effect transistors and second p-channel field-effect transistors is formed on, or not disposed on, field regions adjacent to the active regions of the n-channel field-effect transistors.
7. A semiconductor device including a plurality of active regions enclosed by field regions formed on a silicon substrate and n-channel field-effect transistors and p-channel field-effect transistors formed in the active regions,
wherein the n-channel field-effect transistors and the p-channel field-effect transistors are plurally included,
a direction in which drain currents of the transistors mainly flow is a direction along a <100> crystal axis, or an axis equivalent to the <100> crystal axis, an insulating film including compression stress is formed at upper portions of the n-channel field-effect transistors and the p-channel field-effect transistors, and
the insulating film that is thinner than the insulating film formed at regions positioned between first p-channel field-effect transistors and second p-channel field-effect transistors is formed on, or not disposed on, field regions adjacent to active regions of the n-channel field-effect transistors.