Semiconductor device and a method for manufacturing same
View Patent ↗A semiconductor device, and method for manufacturing the same, manufactured by a simpler process, compared to a conventional trench lateral power MOSFET for a withstand voltage of 80 V, having a smaller device pitch and lower on-resistance per unit area as compared with a conventional lateral power MOSFET with a withstand voltage lower than 80 V. The semiconductor device may include a shallow and narrow trench formed in a substrate with small spacing, a drift region that is an n diffusion region formed around the trench, a gate oxide film having a uniform thickness of about 0.05 μm formed inside the trench, a gate polysilicon formed inside the gate oxide film, a base region and a source region that is an n + diffusion region formed in the surface region of the substrate, a drain region that is an n + diffusion region formed at the trench bottom, interlayer dielectric provided inside the gate polysilicon, and drain polysilicon filling a space inside the interlayer dielectric in the trench and electrically connecting to the drain region.
1. A method for manufacturing a semiconductor device, comprising:
forming a trench in a surface region of a semiconductor substrate, of a first conductivity type;
forming a drift region, of a second conductivity type, around the trench;
forming a gate insulating film, having a uniform thickness, along a side surface and a bottom surface of the trench and inside the trench;
forming a first conductor along a surface of the gate insulating film
etching back the first conductor in an active region so that the first conductor remains only in side surface regions of the trench;
forming a base region of, the first conductivity type, and a source region, of said second conductivity type, in a surface region of the semiconductor substrate outside the trench;
forming an interlayer dielectric inside said first conductor;
selectively removing a bottom of the interlayer dielectric in the active region;
forming a drain region of, the second conductivity type, at the bottom of the trench; and
forming a second conductor in the trench, the second conductor electrically connecting to the drain region.
2. The method for manufacturing a semiconductor device of claim 1 , further comprising:
forming an interlayer dielectric on a surface of the semiconductor substrate;
opening contact holes through the interlayer dielectric;
forming a gate electrode that electrically connects to the first conductor, a drain electrode that electrically connects to the second conductor, and a source electrode that electrically connects to the source region.
3. The method for manufacturing a semiconductor device of claim 1 , wherein the etching back of the first conductor includes over-etching the first conductor so that only a portion of the first conductor lower than the surface of the semiconductor substrate remains un-removed.
4. The method for manufacturing a semiconductor device of claim 2 , wherein the etching back of the first conductor includes over-etching the first conductor so that only a portion of the first conductor lower than the surface of the semiconductor substrate remains un-removed.
5. The method for manufacturing a semiconductor device of claim 1 , wherein the trench is formed by one etching.