IP Library Granted Patent US 6,842,063
Granted Patent B2
US 6,842,063 · App. 10/625,738 · Granted Jan 11, 2005

Analog switch circuit

Assignee: Fujitsu Limited
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Quick Facts
Patent No.
US 6,842,063
App. No.
10/625,738
Granted
Jan 11, 2005
Kind
B2
Abstract

An analog switch circuit with superior breakdown voltage characteristics that can operate at a high speed at a low power supply voltage. The analog switch circuit includes a comparator circuit for inputting and comparing an analog input signal input to an analog switch section and a reference signal. If the input potential of the analog input signal is lower than the reference potential of the reference signal, a voltage boost circuit sets a potential of a gate of an n MOS transistor included in the analog switch section to a potential of positive power supply voltage. If the input potential of the analog input signal is higher than the reference potential of the reference signal, the voltage boost circuit boosts the potential of the gate to a potential higher than the potential of power supply voltage.

Claims (14)

1. An analog switch circuit for sampling an analog input signal, the circuit comprising:

an analog switch section including a first n-channel MOS field effect transistor and a first p-channel MOS field effect transistor, sources of which are connected, drains of which are connected, and therefore said first n-channel and first p-channel MOS field transistors are connected in parallel, for receiving the analog input signal and for outputting a sampled analog output signal;

a comparator circuit for receiving the analog input signal and a reference signal and for comparing the input potential of the analog input signal and the reference potential of the reference signal; and

a voltage boost circuit for setting a potential of a gate of the first n-channel MOS field effect transistor to a potential of positive power supply voltage in the case of the input potential of the analog input signal being lower than the reference potential at the time of the analog switch section being in a continuity state and for boosting the potential of the gate to a potential higher than the potential of the positive power supply voltage in the case of the input potential of the analog input signal being higher than the reference potential at the time of the analog switch section being in the continuity state.

2. The analog switch circuit according to claim 1 , wherein the comparator circuit includes a filter for absorbing a drop in the input potential of the analog input signal input at the time of the analog switch section being in the continuity state.

3. The analog switch circuit according to claim 1 , further comprising a signal line for receiving a signal for performing boosting of the potential of the gate of the first n-channel MOS field effect transistor to the potential higher than the potential of the positive power supply voltage regardless of the result of a comparison made by the comparator circuit.

4. The analog switch circuit according to claim 1 , further comprising a signal line for receiving a signal for not performing boosting of the potential of the gate of the first n-channel MOS field effect transistor to the potential higher than the potential of the positive power supply voltage regardless of the result of a comparison made by the comparator circuit.

5. An analog switch circuit for sampling an analog input signal, the circuit comprising:

an analog switch section including a first n-channel MOS field effect transistor and a first p-channel MOS field effect transistor, sources of which are connected, drains of which are connected, and therefore said first n-channel and first p-channel MOS field effect transistors are connected in parallel, for receiving the analog input signal and for outputting a sampled analog output signal;

a comparator circuit for receiving the analog input signal and a reference signal and for comparing the input potential of the analog input signal and the reference potential of the reference signal; and

a circuit for setting a potential of a gate of the first p-channel MOS field effect transistor to a potential of negative power supply voltage or ground potential in the case of the input potential of the analog input signal being higher than the reference potential at the time of the analog switch section being in a continuity state and for setting the potential of the gate to a potential lower than the potential of the negative power supply voltage or the ground potential in the case of the input potential of the analog input signal being lower than the reference potential at the time of the analog switch section being in the continuity state.

6. The analog switch circuit according to claim 5 , wherein the comparator circuit includes a filter for absorbing a rise in the input potential of the analog input signal input at the time of the analog switch section being in the continuity state.

7. The analog switch circuit according to claim 5 , further comprising a signal line for receiving a signal for setting the potential of the gate to the potential lower than the potential of the negative power supply voltage or the ground potential regardless of the result of a comparison made by the comparator circuit.

8. The analog switch circuit according to claim 5 , further comprising a signal line for receiving a signal for not setting the potential of the gate to the potential lower than the potential of the negative power supply voltage or the ground potential regardless of the result of a comparison made by the comparator circuit.

Assignments (9)
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2022
From: MUFG UNION BANK, N.A.
To: SPANSION LLC; CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 059410/0438 →
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Oct 28, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MUFG UNION BANK, N.A.
Reel/Frame 050896/0366 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 30, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036036/0001 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2013
From: FUJITSU SEMICONDUCTOR LIMITED
To: SPANSION LLC
Reel/Frame 031205/0461 →
CHANGE OF NAME Recorded Jul 22, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024982/0245 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 12, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021998/0645 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 24, 2003
From: TACHIBANA, SUGURU; KATO, TATSUO; NUNOKAWA, HIDEO
To: FUJITSU LIMITED
Reel/Frame 014323/0998 →
Priority Claims (1)
JP 2002-229123 · Aug 6, 2002 · national
Continuity (1)
Related Publication 20040119522A1 · Jun 24, 2004