IP Library Granted Patent US 6,989,576
Granted Patent B1
US 6,989,576 · App. 10/634,212 · Granted Jan 24, 2006

MRAM sense layer isolation

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Quick Facts
Patent No.
US 6,989,576
App. No.
10/634,212
Granted
Jan 24, 2006
Kind
B1
Abstract

A process for forming an MRAM element. The process comprises patterning a globally deposited sense layer and then forming a spacer about the patterned sense layer so as to cover the lateral edges of the patterned sense layer. Subsequently, a globally deposited tunnel layer and fixed layer are patterned so as to define the MRAM element. Preferably, the pinned layer is patterned such that the outer lateral edges of the pinned layer is displaced in a direction parallel to the substrate from the lateral edges of the patterned sensed layer thereby reducing coupling effects between the two layers. Moreover, the use of a spacer during the process further inhibits shorting between the sense layer and the pinned layer during patterning of the pinned layer.

Claims (20)

1. A magnetic memory device formed on a substrate comprising:

a pinned layer magnetized in a first direction and patterned to a first width;

a sense layer that can be selectively magnetized in the first direction or a second direction that is opposite the first direction so as to change the net resistivity of the magnetic memory device, and wherein the sense layer is patterned to a second width that is at least less than the first width to thereby reduce magnetic coupling between the pinned and sensed layers;

a spacer that is positioned about the outer lateral edge of the sense layer, wherein the spacer is interposed between the outer lateral edges of the sense layer and the pinned layer, wherein the spacer is formed of a non-conducting material selected from the group consisting of silicon nitride (SiN), SiC, and a-carbon.

2. The device of claim 1 , wherein the substrate comprises a conductor formed therein.

3. The device of claim 2 , wherein the pinned layer is formed above the substrate so as to overlie the conductor.

4. The device of claim 3 , wherein the magnetic memory device further comprises a tunnel layer that is formed so as to overlie the pinned layer and be interposed between the pinned layer and the sense layer.

5. The device of claim 4 , wherein the sense layer is formed so as to overlie the tunnel layer.

6. The device of claim 1 , wherein the sense layer comprises a variable magnetic field that can be varied by the application of an external field to thereby change the combined magnetic characteristics of the pinned and sense magnetic layers.

7. A magnetic memory device formed on a substrate comprising:

a pinned layer magnetized in a first direction and patterned to a first width;

a sense layer that can be selectively magnetized in the first direction or a second direction that is opposite the first direction so as to change the net resistivity of the magnetic memory device, and wherein the sense layer is patterned to a second width that is at least less than the first width to thereby reduce magnetic coupling between the pinned and sensed layers;

a spacer that is positioned about the outer lateral edge of the sense layer, wherein the spacer is interposed between the outer lateral edges of the sense layer and the pinned layer, wherein the spacer is formed of a non-conducting material selected from the group consisting of silicon nitride (SiN), SiC, and a-carbon, wherein the pinned layer is formed of nickel iron (NiFe), the tunnel layer is formed of aluminum oxide (Al 2 O 3 ) and the sense layer is formed of nickel iron cobalt (NiFeCo).

8. A magnetic memory device comprising:

a substrate having an opening formed therein;

a conductor formed within the opening of the substrate;

a pinned layer formed above the substrate so as to overlie the conductor, wherein the pinned layer is magnetized in a first direction, and wherein the pinned layer is patterned to a first width;

a tunnel layer formed above the pinned layer so as to overlie the pinned layer, wherein the tunnel layer is patterned to the first width;

a sense layer formed above the tunnel layer so as to overlie the tunnel layer, wherein the sense layer can be selectively magnetized in the first direction or a second direction that is opposite the first direction so as to change the net resistivity of the magnetic memory device, and wherein the sense layer is patterned to a second width that is at least less than the first width to thereby reduce magnetic coupling between the pinned and sense layers; and

a spacer that is positioned about the outer lateral edges of the sense layer, wherein the spacer is formed of a material selected from the group consisting of silicon nitride, silicon carbide, and amorphous carbon.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →