Oscillator for SERDES
View Patent ↗An LC voltage controlled oscillator for use in a SERDES. The oscillator comprises a pair of cross coupled field effect transistors coupled with a pair of multi-layer inductors.
1. An LC voltage controlled oscillator for use in a SERDES, the oscillator comprising:
a pair of cross coupled field effect transistors; and
a pair of multi-layer inductors coupled with the cross coupled field effect transistors.
2. The LC voltage controlled oscillator, as set forth in claim 1 , further comprising a plurality of capacitor digital-to-analog converters for frequency tuning the output of the oscillator.
3. The LC voltage controlled oscillator, as set forth in claim 1 , further comprising an automatic gain control to adjust the amplitude of the output of the oscillator.
4. The LC voltage controlled oscillator, as set forth in claim 1 , wherein the output of the oscillator is a current mode logic differential signal.
5. A SERDES comprising:
an integrated circuit comprising:
a serializer having a first LC VCO having a first and second multilayer inductor;
a deserializer having a second LC VCO having a third and fourth multi-layer inductor.
6. The SERDES, as set forth in claim 5 , wherein the first LC VCO further comprises a plurality of capacitor digital-to-analog converters for frequency tuning the output of the oscillator.
7. The SERDES, as set forth in claim 5 , wherein the first LC VCO further comprises an automatic gain control to adjust the amplitude of the output of the oscillator.
8. The SERDES, as set forth in claim 5 , wherein the first LC VCO wherein the output of the first LC VCO is a current mode logic differential signal.
9. The SERDES, as set forth in claim 5 , wherein the second LC VCO further comprises a plurality of capacitor digital-to-analog converters for frequency tuning the output of the oscillator.
10. The SERDES, as set forth in claim 5 , wherein the second LC VCO further comprises an automatic gain control to adjust the amplitude of the output of the oscillator.
11. The SERDES, as set forth in claim 5 , wherein the output of the second LC VCO is a current mode logic differential signal.
12. An integrated circuit comprising:
a plurality of embedded SERDES, wherein each SERDES includes a serializer and a deserializer; and
a plurality of voltage controlled oscillators associated with the SERDES, each voltage controlled oscillator includes a pair of multi-layer inductors.
13. The integrated circuit, as set forth in claim 12 , further comprising a control circuit for tuning the plurality of voltage controlled oscillators, the control circuit formed using NMOS FETS.
14. The integrated circuit, as set forth in claim 12 , further comprising a control circuit for tuning the plurality of voltage controlled oscillators, the control circuit formed using CMOS circuitry.
15. The integrated circuit, as set forth in claim 12 , further comprising a control circuit for tuning the plurality of voltage controlled oscillators, the control circuit formed using NPN bi-polar transistors.