IP Library Granted Patent US 7,023,316
Granted Patent B2
US 7,023,316 · App. 10/644,278 · Granted Apr 4, 2006

Semiconductor device with electrically coupled spiral inductors

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Quick Facts
Patent No.
US 7,023,316
App. No.
10/644,278
Granted
Apr 4, 2006
Kind
B2
Abstract

Multiple coupled inductors are formed in a well in a semiconductor device. The inductors, which preferably are spiral inductors, are strongly coupled with high quality factors. The coupled inductors may be used as efficient signal splitting and combining circuits.

Claims (42)

1. A semiconductor comprising:

a semiconductor substrate having a downwardly extending cavity formed therein;

a first spiral conductor formed in the cavity, said first spiral conductor being fabricated substantially in a first horizontal plane within the cavity; and

a second spiral conductor formed in the cavity, said second spiral conductor being fabricated substantially in a second horizontal plane within the cavity and above the first plane, wherein the first and second spiral conductors are electrically isolated from one another and are positioned to be inductively coupled during operation.

2. The semiconductor of claim 1 wherein the first and second spiral conductors have an inductive coupling coefficient greater than about 0.8.

3. The semiconductor of claim 1 wherein:

each of said conductors has a center; and

said centers are substantially aligned along an axis.

4. The semiconductor of claim 3 wherein:

said first inductor has a first number of turns; and

said second inductor has a second number of turns.

5. The semiconductor of claim 4 wherein said first and second numbers are equal.

6. The semiconductor of claim 5 wherein:

said semiconductor has a major surface defining a plane; and

said cavity is formed in said major surface.

7. The semiconductor of claim 6 wherein said cavity comprises:

a bottom surface substantially parallel to said plane; and

a side wall substantially perpendicular to said plane.

8. The semiconductor of claim 6 wherein said cavity comprises:

a bottom surface substantially parallel to said plane; and

a side wall at an oblique angle relative to said plane.

9. The semiconductor of claim 8 wherein said side wall is at an angle of about 54.74° relative to said plane.

10. The semiconductor of claim 4 wherein:

said semiconductor has a major surface defining a plane; and

said cavity is formed in said major surface.

11. The semiconductor of claim 10 wherein said cavity comprises:

a bottom surface substantially parallel to said plane; and

a side wall substantially perpendicular to said plane.

12. The semiconductor of claim 10 wherein said cavity comprises:

a bottom surface substantially parallel to said plane; and

a side wall at an oblique angle relative to said plane.

13. The semiconductor of claim 12 wherein said side wall is at an angle of about 54.74° relative to said plane.

14. The semiconductor of claim 3 wherein:

said semiconductor has a major surface defining a plane; and

said cavity is formed in said major surface.

15. The semiconductor of claim 14 wherein said cavity comprises:

a bottom surface substantially parallel to said plane; and

a side wall substantially perpendicular to said plane.

16. The semiconductor of claim 14 wherein said cavity comprises:

a bottom surface substantially parallel to said plane; and

a side wall at an oblique angle relative to said plane.

17. The semiconductor of claim 16 wherein said side wall is at an angle of about 54.74° relative to said plane.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →