IP Library Granted Patent US 7,449,908
Granted Patent B2
US 7,449,908 · App. 10/647,472 · Granted Nov 11, 2008

Process monitor for monitoring an integrated circuit chip

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Quick Facts
Patent No.
US 7,449,908
App. No.
10/647,472
Granted
Nov 11, 2008
Kind
B2
Abstract

A system or apparatus for monitoring an Integrated Circuit (IC) chip includes: a sense circuit at least partially constructed on the IC chip and configured to produce one or more sense signals each indicative of a corresponding process-dependent circuit parameter of the IC chip; and a digitizer module configured to produce, responsive to the one or more sense signals, one or more digitized signals each representative of a corresponding one of the sense signals. A controller is configured to determine a value of one or more of the process-dependent circuit parameters based on one or more of the digitized signals.

Claims (36)

1. A method of monitoring an integrated circuit chip, comprising:

(a) receiving a digitized sense signal from the integrated circuit chip, wherein the at least one digitized sense signal is a digital representation of a corresponding process-dependent circuit parameter within the integrated circuit chip;

(b) determining an analog value for the process-dependent circuit parameter from the corresponding digitized sense signal, wherein the process-dependent circuit parameter is measured within a process monitor portion of the integrated circuit; and

(c) configuring an operational portion of the integrated circuit to account for the measured process-dependent parameter utilizing the determined analog value.

2. The method according to claim 1 , wherein steps (a), (b), and (c) are performed outside of the integrated circuit chip.

3. The method according to claim 1 , wherein step (b) comprises retrieving the analog value from a look-up table using the digitized sense signal.

4. The method according to claim 1 , wherein step (b) comprises calculating the analog value from the digitized sense signal.

5. The method according to claim 1 , wherein the digitized sense signal represents a gate-to-source threshold voltage of a transistor fabricated on the integrated circuit chip.

6. The method according to claim 1 , wherein the digitized sense signal represents a transconductance parameter of a transistor fabricated on the integrated circuit chip.

7. The method according to claim 1 , wherein the digitized sense signal represents a sheet resistance of a resistor fabricated on the integrated circuit chip.

8. The method according to claim 1 , wherein the digitized sense signal represents a temperature of the integrated circuit chip.

9. The method according to claim 1 , wherein the digitized sense signal represents a power supply voltage on the integrated circuit chip.

10. The method according to claim 1 , wherein the digitized sense signal includes a plurality of digitized sense signals representative of corresponding process-dependent parameters selected from the set of

a gate-to-source threshold voltage of a transistor fabricated on the integrated circuit chip;

a transconductance parameter of a transistor fabricated on the integrated circuit chip;

a sheet resistance of a resistor fabricated on the integrated circuit chip;

a temperature of the integrated circuit chip; and

a power supply voltage on the integrated circuit chip.

11. A system for monitoring an integrated circuit chip, comprising:

means for receiving a digitized sense signal from the integrated circuit chip, wherein the at least one digitized sense signal is a digital representation of a corresponding process-dependent circuit parameter within the integrated circuit chip; and

means for determining an analog value for the process-dependent circuit parameter from the corresponding digitized sense signal, wherein the process-dependent circuit parameter is measured within a process monitor portion of the integrated circuit; and

means for configuring an operational portion of the integrated circuit to account for the measured process-dependent parameter utilizing the determined analog value.

12. The system according to claim 11 , wherein the means for receiving and the means for determining are positioned external of the integrated circuit chip.

13. The system according to claim 11 , wherein the means for determining comprises means for retrieving the analog value from a look-up table using the digitized sense signal.

14. The system according to claim 11 , wherein the means for determining comprises means for calculating the analog value from the digitized sense signal.

15. The system according to claim 11 , wherein the one digitized sense signal represents a gate-to-source threshold voltage of a transistor fabricated on the integrated circuit chip.

16. The system according to claim 11 , wherein the at digitized sense signal represents a transconductance parameter of a transistor fabricated on the integrated circuit chip.

17. The system according to claim 11 , wherein the digitized sense signal represents a sheet resistance of a resistor fabricated on the integrated circuit chip.

18. The system according to claim 11 , wherein the digitized sense signal represents a temperature of the integrated circuit chip.

19. The system according to claim 11 , wherein the digitized sense signal represents a power supply voltage on the integrated circuit chip.

20. The system according to claim 11 , wherein the digitized sense signal includes a plurality of digitized sense signals representative of corresponding process-dependent parameters selected from the set of.

a gate-to-source threshold voltage of a transistor fabricated on the integrated circuit chip;

a transconductance parameter of a transistor fabricated on the integrated circuit chip;

a sheet resistance of a resistor fabricated on the integrated circuit chip;

a temperature of the integrated circuit chip; and

a power supply voltage on the integrated circuit chip.

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERROR IN RECORDING THE MERGER PREVIOUSLY RECORDED AT REEL: 047357 FRAME: 0302. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Mar 22, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048674/0834 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER PREVIOUSLY RECORDED ON REEL 047195 FRAME 0658. ASSIGNOR(S) HEREBY CONFIRMS THE THE EFFECTIVE DATE IS 09/05/2018. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047357/0302 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047195/0658 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 26, 2003
From: BURNS, LAWRENCE M.; DAUPHINEE, LEONARD; GOMEZ, RAMON A.; CHANG, JAMES Y.C.
To: BROADCOM CORPORATION
Reel/Frame 014429/0885 →