IP Library Granted Patent US 7,406,268
Granted Patent B2
US 7,406,268 · App. 10/649,602 · Granted Jul 29, 2008

Optical receiver circuit

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Quick Facts
Patent No.
US 7,406,268
App. No.
10/649,602
Granted
Jul 29, 2008
Kind
B2
Abstract

An optical receiver circuit is constructed to be immune to interference from external interference signals. The optical receiver circuit includes a differential amplifier having an optical reception device connected to one input of the differential amplifier. The optical receiver circuit also includes an electrical element for simulating the electrical behavior of the reception device in the illumination-free state. The electrical element is connected to the other input of the differential amplifier.

Claims (50)

1. An optical receiver circuit, comprising:

a differential amplifier including a first input and a second input;

an optical reception device connected to said first input of said differential amplifier by a first preamplifier said optical reception device having an electrical behavior in an illumination-free case;

an electrical element for simulating the electrical behavior of said optical reception device in the illumination-free case, said electrical element connected to said second input of said differential amplifier by a second preamplifier; and

said first preamplifier and said second preamplifier being identical user-settable transimpedance amplifiers.

2. The optical receiver circuit according to claim 1 , wherein:

said electrical element is formed by a darkened, further reception device.

3. The optical receiver circuit according to claim 2 , wherein:

said optical reception device and said further reception device are monolithically integrated on a chip.

4. The optical receiver circuit according to claim 1 , wherein:

said optical reception device and said electrical element are connected to a common supply voltage.

5. The optical receiver circuit according to claim 4 , further comprising:

a low-pass filter connected to the common supply voltage.

6. The optical receiver circuit according to claim 1 , wherein:

said optical reception device is a photodiode; and

said electrical element is a photodiode.

7. The optical receiver circuit according to claim 1 , further comprising:

a package for packaging said differential amplifier, said optical reception device, and said electrical element, said package being selected from the group consisting of a TO-46 package, a TSSOP10 package, and a VQFN20 package.

8. The optical receiver circuit according to claim 7 , further comprising:

an integrated control circuit having a control terminal, said package having a terminal pin forming said control terminal.

9. An optical receiver circuit, comprising:

a differential amplifier including a first input and a second input;

an optical reception device connected to said first input of said differential amplifier by a first preamplifier, said optical reception device having an electrical behavior in an illumination-free case;

an electrical element for simulating the electrical behavior of said optical reception device in the illumination-free case, said electrical element connected to said second input of said differential amplifier by a second preamplifier; and

said first preamplifier and said second preamplifier being identical;

an integrated control circuit;

said first preamplifier being a transimpendance amplifier having a feedback impedance with a magnitude being settable by a user via said integrated control circuit; and

said second preamplifier being a transimpedance amplifier having a feedback impedance with a magnitude being settable by a user via said integrated control circuit.

10. The optical receiver circuit according to claim 9 , wherein:

said integrated control circuit is connected symmetrically to said feedback impedance of said first amplifier and to said feedback impedance of said second amplifier.

11. The optical receiver circuit according to claim 9 , wherein:

said electrical element is formed by a darkened, further reception device.

12. The optical receiver circuit according to claim 11 , wherein:

said optical reception device and said further reception device are monolithically integrated on a chip.

13. The optical receiver circuit according to claim 9 , wherein:

said optical reception device and said electrical element are connected to a common supply voltage.

14. The optical receiver circuit according to claim 13 , further comprising:

a low-pass filter connected to the common supply voltage.

15. The optical receiver circuit according to claim 9 , wherein:

said optical reception device is a photodiode; and

said electrical element is a photodiode.

16. The optical receiver circuit according to claim 9 , further comprising:

a package for packaging said differential amplifier, said optical reception device, and said electrical element, said package being selected from the group consisting of a TO-46 package, a TSSOP10 package, and a VQFN20 package.

17. The receiver circuit according to claim 16 , further comprising:

an integrated control circuit having a control terminal, said package having a terminal pin forming said control terminal.

18. An optical receiver circuit, comprising:

a differential amplifier including a first input and a second input;

an optical reception device connected to said first input of said differential amplifier by a first preamplifier;

a dummy optical reception device connected to said second input of said differential amplifier by a second preamplifier; and

an integrated control circuit adapted to enable a user to externally control transimpendance characteristics of the first and second preamplifiers.

Assignments (10)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERROR IN RECORDING THE MERGER PREVIOUSLY RECORDED AT REEL: 047357 FRAME: 0302. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Mar 22, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048674/0834 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF MERGER PREVIOUSLY RECORDED ON REEL 047195 FRAME 0658. ASSIGNOR(S) HEREBY CONFIRMS THE THE EFFECTIVE DATE IS 09/05/2018. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047357/0302 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047195/0658 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032851-0001) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 037689/0001 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032851/0001 →
MERGER Recorded May 7, 2013
From: AVAGO TECHNOLOGIES FIBER IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 030369/0672 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 16, 2007
From: INFINEON TECHNOLOGIES AG
To: AVAGO TECHNOLOGIES FIBER IP (SINGAPORE) PTE. LTD.
Reel/Frame 019704/0187 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 19, 2007
From: SCHROEDINGER, KARL
To: INFINEON TECHNOLOGIES AG
Reel/Frame 019447/0167 →