IP Library Granted Patent US 7,125,730
Granted Patent B2
US 7,125,730 · App. 10/653,907 · Granted Oct 24, 2006

Power supply, a semiconductor making apparatus and a semiconductor wafer fabricating method using the same

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Quick Facts
Patent No.
US 7,125,730
App. No.
10/653,907
Granted
Oct 24, 2006
Kind
B2
Abstract

In power supply and a semiconductor making apparatus and a semiconductor fabricating method using the same, an abnormality can be detected when an offset occurs in a part constituting a closed-loop system of high-frequency power supply or dc power supply for a semiconductor making apparatus. Power supply for receiving a power value setting signal to set strength of power and a power on/off instruction to set on or off of outputting of the power interrupts the supply of the power even in a state in which a subsequent power on/off instruction is on if a power sense signal according to a value obtained by sensing the power exceeds a predetermined value when the power on/off instruction is off.

Claims (16)

1. A semiconductor wafer fabricating method, comprising the steps of:

setting, to a power supply for supplying an output of a current, a voltage, or power as an output item necessary for processing of a semiconductor wafer, strength of the output item;

setting outputting of the output item to “on” or “off”;

sensing the output item and providing an output sense signal according to a value obtained by sensing the output item; and

stopping the processing for a subsequent semiconductor wafer to be processed in response to an event in which the output sense signal exceeds a predetermined threshold value when the outputting of the output item is “off”.

2. A semiconductor wafer fabricating method, comprising the steps of:

setting, to a power supply for supplying a current, a voltage, or power as an output item necessary for processing of a semiconductor wafer, a strength of the output item;

setting outputting of the output item to “on or off;

sensing the output item to provide an output sense signal according to a value obtained by sensing the output item; and

assuming occurrence of an abnormality and displaying an abnormality indication in response to an event in which the output sense signal exceeds a predetermined threshold value when the outputting of the output item is “off”.

3. A semiconductor wafer fabricating method for use with power supply for supplying power indicating a current or a voltage necessary for processing a semiconductor wafer, comprising the steps of:

setting a strength of the power to a predetermined value;

setting the supply of the power to “on” or “off”;

sensing the power presently being supplied to the semiconductor wafer processing and outputting a sense signal according to a value obtained by sensing the present power;

sensing the power when a power state is set “off” determining occurrence of an abnormality when the sense signal according to a value obtained by sensing the power exceeds a predetermined value, and generating an abnormality occurrence signal indicating occurrence of the abnormality; and

inhibiting, in response to the abnormality occurrence signal, the processing for a subsequent semiconductor wafer to be processed.

Assignments (1)
CHANGE OF NAME AND ADDRESS Recorded Mar 30, 2020
From: HITACHI HIGH-TECHNOLOGIES CORPORATION
To: HITACHI HIGH-TECH CORPORATION
Reel/Frame 052259/0227 →