Integrated circuit structure formed by damascene process
View Patent ↗An integrated circuit structure is formed using a damascene process that involves forming a trench or cavity for the structure in a temporary layer of material. A conductive material, such as copper, can then be deposited on the temporary layer to overfill the trench or cavity, and the excess conductive material can be removed by polishing down to the surface of the temporary layer. The integrated circuit structure can then be exposed by removing the temporary layer. One example of an integrated circuit structure that can be formed using this method is an upper electrode in an MRAM array. By using the process to form an upper electrode in an MRAM array, the process of forming a magnetic keeper around the upper electrode is advantageously simplified.
1. A method of forming an electrode in a magnetic random access memory (MRAM) device, the method comprising:
providing a magnetic memory cell;
forming a temporary layer directly over the magnetic memory cell;
forming a trench in the temporary layer;
forming a conductive line within the trench;
completely removing the temporary layer such that side walls of the conductive line are completely exposed;
forming a magnetic layer on exposed surfaces of the conductive line; and
forming an outer barrier layer on the magnetic layer.
2. The method as defined in claim 1 , wherein the outer barrier layer is formed from tantalum or tantalum nitride.
3. The method as defined in claim 2 , wherein forming the conductive line further comprises:
forming an inner barrier layer within the trench; and
forming a layer of conductive material over the barrier layer.
4. The method as defined in claim 3 , wherein the inner barrier layer is formed from tantalum or tantalum nitride and the conductive material is formed from copper.
5. The method as defined in claim 1 , wherein the magnetic layer is formed from permalloy (Ni—Fe) or cobalt iron (Co—Pc).
6. The method as defined in claim 1 , wherein the magnetic layer is formed from at least one of ferrites, manganites, cobaltites, or chromites.
7. A method of forming an electrode in a magnetic random access memory (MRAM) device, the method comprising:
providing a magnetic memory coil;
forming a conductive line comprising copper with a bottom surface facing the magnetic memory cell;
forming a magnetic layer on the conductive line such that the magnetic layer is formed directly on a top copper surface of the conductive line and is formed on side surfaces of the conductive line; and
forming an outer barrier layer on the magnetic layer.
8. The method as defined in claim 7 , wherein the outer barrier layer is formed from tantalum or tantalum nitride.
9. The method as defined in claim 7 , wherein the magnetic layer is formed from permalloy (Ni—Fe) or cobalt iron (Co—Fe).
10. The method as defined in claim 7 , wherein the magnetic layer is formed from at least one of ferrites, manganites, cobaltites, or chromites.