Semiconductor device with alternating conductivity type layer and method of manufacturing the same
View Patent ↗A semiconductor device having an alternating conductivity type layer improves the tradeoff between the on-resistance and the breakdown voltage and facilitates increasing the current capacity by reducing the on-resistance while maintaining a high breakdown voltage. The semiconductor device includes a semiconductive substrate region, through which a current flows in the ON-state of the device and that is depleted in the OFF-state. The semiconductive substrate region includes a plurality of vertical alignments of n-type buried regions 32 and a plurality of vertical alignments of p-type buried regions. The vertically aligned n-type buried regions and the vertically aligned p-type buried regions are alternately arranged horizontally. The n-type buried regions and p-type buried regions are formed by diffusing respective impurities into highly resistive n-type layers 32 a laminated one by one epitaxially.
1. A semiconductor device comprising:
a layer with low electrical resistance;
a semiconductive substrate region on the layer with low electrical resistance, the semiconductive substrate region providing a current path when the semiconductor device is ON and being depleted when the semiconductor device is OFF, the semiconductive substrate region comprising regions of a first conductivity type and regions of a second conductivity type, and the regions of the first conductivity type and the regions of the second conductivity type being arranged alternately with each other;
a first major surface above the surface of the semiconductive substrate region;
a second major surface on the back surface of the layer with low electrical resistance, wherein a net impurity concentration distribution within at least one of the regions of the first conductivity type and the regions of the second conductivity type along a direction crossing the first major surface and the second major surface peaks approximately at the first major suface; and
an electrical resistive region existing between the layer and the regions of the first conductivity type and the regions of the second conductivity type, the electrical resistive region being a different region from the layer and regions.
2. A semiconductor device according to claim 1 , wherein the net impurity concentration distribution peaks approximately at the first major surface is higher than that of the region of the corresponding conductivity type of the semiconductive substrate region.
3. The semiconductor device according to claim 1 , wherein the electrical resistive region has a higher electrical resistance than that of the layer.