IP Library Granted Patent US 7,193,828
Granted Patent B2
US 7,193,828 · App. 10/659,836 · Granted Mar 20, 2007

Video protection circuit providing short to battery protection while maintaining termination impedance

Assignee: Visteon Global Technologies, Inc.
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Quick Facts
Patent No.
US 7,193,828
App. No.
10/659,836
Filed
Sep 11, 2003
Granted
Mar 20, 2007
Kind
B2
Art Unit
2836
USPC
361/91.5
Abstract

The present invention provides for a transistor in series with the video input of a video input device prior to the termination resistor. The transistor is utilized due to the large amount of power that would be dissipated across the termination resistor if the video input was inadvertently connected to the automotive battery voltage. For the typical automotive battery of 14 volts, approximately 2.6 watts would be dissipated over the termination resistor likely causing a failure in the video input device. An N channel MOSFET can be used as the switch to provide an extremely low series resistance compared to the 75 ohm termination resistor. This low series resistance minimizes video signal degradation which would be caused by higher impedance switches due to the voltage divider formed by the switch impedance and the 75 ohm termination resistor. An N channel MOSFET also provides fast switching speeds and can be selected to minimize parasitic capacitances such that the video signal is not degraded due to the 75 ohm source impedance.

Claims (33)

1. A video input protection circuit connected to a video circuit, the video input protection circuit comprising:

a video input terminal for receiving a video signal;

a first transistor in electrical series with the video input terminal;

a termination resistor in electrical connection with the first transistor, wherein the first transistor is connected between the video input terminal and the termination resistor; and

a second transistor in electrical communication with the first transistor.

2. The video input protection circuit according to claim 1 , wherein the first transistor is configured to limit voltage applied to the termination resistor.

3. The video input protection circuit according to claim 1 , wherein the first transistor includes an N channel MOSFET transistor.

4. The video input protection circuit according to claim 1 , wherein a drain of the first transistor is connected to the video input terminal and a source of the first transistor is in communication with the termination resistor.

5. The video input protection circuit according to claim 1 , wherein a gate of the first transistor is in communication with the second transistor and a power source.

6. The video input protection circuit according to claim 5 , further comprising a voltage divider circuit.

7. The video input protection circuit according to claim 6 , wherein the voltage divider circuit is connected to the video circuit.

8. The video input protection circuit according to claim 6 , wherein the voltage divider circuit is in communication with the second transistor.

9. The video input protection circuit according to claim 8 , wherein the voltage divider circuit includes a first and second resistor, the first resistor being connected to the termination resistor on a first end and a base of the second transistor on a second end, the second resistor being connected to a base of the second transistor on a first end and an electrical ground on a second end.

10. The video input circuit according to claim 1 , further comprising a first zener diode connected between the video input terminal and an electrical ground.

11. The video input protection circuit according to claim 10 , further comprising a second zener diode in electrical series connection with the first the zener diode between the video input terminal and the electrical ground.

12. The video input protection circuit according to claim 11 , wherein an anode of the first zener diode is in communication with the video input terminal and the cathode of the first zener diode is in communication with the electrical ground, an anode of the second zener diode is in communication with the electrical ground and the cathode of the second zener diode is in communication with the video input terminal.

13. The video input protection circuit according to claim 1 , wherein the second transistor is configured to clamp the voltage of the first transistor.

14. A video input protection circuit connected to a video circuit, the video input protection circuit comprising:

a video in input terminal for receiving a video signal;

a N channel MOSFET transistor in electrical series with the video input terminal;

a termination resistor in electrical connection with the N channel MOSFET, wherein the N channel MOSFET is connected between the video input terminal and the termination resistor; and

a second transistor in electrical communication with the N channel MOSFET.

15. The video input protection circuit according to claim 14 , wherein a drain of the N channel MOSFET transistor is connected to the video input terminal and a source of the N channel MOSFET transistor is in communication with the termination resistor.

16. The video input protection circuit according to claim 14 , wherein the N channel MOSFET transistor is configured to limit voltage applied to the termination resistor.

17. The video input protection circuit according to claim 14 , wherein a gate of the N channel MOSFET transistor is in communication with the second transistor and a power source.

18. The video input protection circuit according to claim 14 , further comprising a voltage divider circuit.

19. The video input protection circuit according to claim 18 , wherein the voltage divider is connected to the video circuit.

20. The video input protection circuit according to claim 18 , wherein the voltage divider circuit is in communication with the second transistor.

21. The video input protection circuit according to claim 20 , wherein the voltage divider circuit includes a first and second resistor, the first resistor being connected to the termination resistor on a first end and a base of the second transistor on a second end, the second resistor being connected to the base of the second transistor on a first end and an electrical ground on a second end.

22. The video input circuit according to claim 14 , further comprising a first zener diode connected between the video input terminal and an electrical ground.

23. The video input protection circuit according to claim 22 , further comprising a second zener diode in electrical series connection with the first the zener diode between the video input terminal and the electrical ground.

24. The video input protection circuit according to claim 23 , wherein an anode of the first zener diode is in communication with the video input terminal and the cathode of the first zener diode is in communication with the electrical ground, an anode of the second zener diode is in communication with the electrical ground and the cathode of the second zener diode is in communication with the video input terminal.

25. The video input protection circuit according to claim 14 , wherein the second transistor is configured to clamp the voltage of the N channel MOSFET.

Assignments (12)
RELEASE OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Jun 9, 2014
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: VISTEON CORPORATION; VC AVIATION SERVICES, LLC; VISTEON ELECTRONICS CORPORATION; VISTEON GLOBAL TECHNOLOGIES, INC.; VISTEON INTERNATIONAL HOLDINGS, INC.; VISTEON GLOBAL TREASURY, INC.; VISTEON EUROPEAN HOLDINGS, INC.; VISTEON SYSTEMS, LLC; VISTEON INTERNATIONAL BUSINESS DEVELOPMENT, INC.
Reel/Frame 033107/0717 →
SECURITY INTEREST Recorded Apr 18, 2014
From: VISTEON CORPORATION, AS GRANTOR; VISTEON GLOBAL TECHNOLOGIES, INC., AS GRANTOR
To: CITIBANK., N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 032713/0065 →
CORRECTIVE ASSIGNMENT TO CORRECT THE RECORD TO REMOVE THE INCORRECT PATENT NO. 7193928 PREVIOUSLY RECORDED ON REEL 026178 FRAME 0412. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE BY SECURED PARTY AGAINST SECURITY INTEREST IN PATENTS ON REEL 025241 FRAME 317. Recorded Jun 14, 2011
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: VISTEON CORPORATION; VC AVIATION SERVICES, LLC; VISTEON ELECTRONICS CORPORATION; VISTEON GLOBAL TECHNOLOGIES, INC.; VISTEON INTERNATIONAL HOLDINGS, INC.; VISTEON GLOBAL TREASURY, INC.; VISTEON EUROPEAN HOLDING, INC.; VISTEON SYSTEMS, LLC; VISTEON INTERNATIONAL BUSINESS DEVELOPMENT, INC.
Reel/Frame 026442/0776 →
SECURITY AGREEMENT (REVOLVER) Recorded Oct 19, 2010
From: VISTEON CORPORATION; VC AVIATION SERVICES, LLC; VISTEON ELECTRONICS CORPORATION; VISTEON GLOBAL TECHNOLOGIES, INC.; VISTEON INTERNATIONAL HOLDINGS, INC.; VISTEON GLOBAL TREASURY, INC.; VISTEON EUROPEAN HOLDINGS, INC.; VISTEON SYSTEMS, LLC; VISTEON INTERNATIONAL BUSINESS DEVELOPMENT, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS AGENT
Reel/Frame 025238/0298 →
SECURITY AGREEMENT Recorded Oct 19, 2010
From: VISTEON CORPORATION; VC AVIATION SERVICES, LLC; VISTEON ELECTRONICS CORPORATION; VISTEON GLOBAL TECHNOLOGIES, INC.; VISTEON INTERNATIONAL HOLDINGS, INC.; VISTEON GLOBAL TREASURY, INC.; VISTEON EUROPEAN HOLDING, INC.; VISTEON SYSTEMS, LLC; VISTEON INTERNATIONAL BUSINESS DEVELOPMENT, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS AGENT
Reel/Frame 025241/0317 →
RELEASE BY SECURED PARTY AGAINST SECURITY INTEREST IN PATENTS RECORDED AT REEL 022575 FRAME 0186 Recorded Oct 7, 2010
From: WILMINGTON TRUST FSB, AS ADMINISTRATIVE AGENT
To: VISTEON GLOBAL TECHNOLOGIES, INC.
Reel/Frame 025105/0201 →
RELEASE BY SECURED PARTY AGAINST SECURITY INTEREST IN PATENTS RECORDED AT REEL 022974 FRAME 0057 Recorded Oct 6, 2010
From: THE BANK OF NEW YORK MELLON
To: VISTEON GLOBAL TECHNOLOGIES, INC.
Reel/Frame 025095/0711 →
ASSIGNMENT OF PATENT SECURITY INTEREST Recorded Jul 17, 2009
From: JPMORGAN CHASE BANK, N.A., A NATIONAL BANKING ASSOCIATION
To: THE BANK OF NEW YORK MELLON, AS ADMINISTRATIVE AGENT
Reel/Frame 022974/0057 →
ASSIGNMENT OF SECURITY INTEREST IN PATENTS Recorded Apr 21, 2009
From: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
To: WILMINGTON TRUST FSB, AS ADMINISTRATIVE AGENT
Reel/Frame 022575/0186 →
SECURITY INTEREST Recorded Feb 27, 2009
From: VISTEON GLOBAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK
Reel/Frame 022368/0001 →
SECURITY AGREEMENT Recorded Feb 7, 2008
From: VISTEON GLOBAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 020497/0733 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2003
From: WEINDORF, PAUL F.L.; LEINONEN, MARK A.
To: VISTEON GLOBAL TECHNOLOGIES, INC.
Reel/Frame 014497/0467 →
Continuity (1)
Related Publication 20050057874A1 · Mar 17, 2005