IP Library Granted Patent US 7,094,639
Granted Patent B2
US 7,094,639 · App. 10/662,288 · Granted Aug 22, 2006

Method for fabricating semiconductor device

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Quick Facts
Patent No.
US 7,094,639
App. No.
10/662,288
Granted
Aug 22, 2006
Kind
B2
Abstract

An underlying insulting film of silicon oxide, a gate insulating film of hafnium oxide, a gate electrode of polysilicon, and side walls of silicon oxide are formed above an element formation region of a semiconductor substrate. In the upper portion of the element formation region of the semiconductor substrate, source and drain areas and extension areas are formed by implantations of respective types. Thereafter, the scan speed of the semiconductor substrate and the pulse interval and the peak power of laser beam are adjusted to irradiate only the vicinity of the surface of the semiconductor substrate with laser beam for 0.1 second so that the vicinity of the surface of the semiconductor substrate has a temperature of 1150 to 1250° C. Thus, heat treatments for the gate insulating film and the source and drain areas are performed.

Claims (39)

1. A method for forming a semiconductor device, comprising the steps of:

a) forming an insulating film comprising silicon on a substrate;

b) forming a high dielectric insulating film on the insulating film;

c) forming a gate electrode on the gate insulating film;

d) forming a side wall on a side face of the gate insulating film;

e) forming a source/drain region below the side of the gate insulating film in the substrate; and

f) irradiating a light onto the substrate having the high dielectric insulating film and the source/drain region, so as to reduce a crystal defect of the high dielectric insulating film.

2. The method of claim 1 , wherein the insulating film contains nitrogen.

3. The method of claim 1 , wherein the substrate is heated by a heating source other than the light during step f).

4. The method of claim 1 , wherein a surface of the substrate has a temperature of 1150 to 1250° C. during step f).

5. The method of claim 1 , wherein the light has a wavelength of 0.4 μm or less.

6. The method of claim 3 , wherein the substrate is heated to about 100 to 500° C. during step f).

7. The method of claim 1 , wherein the high dielectric insulating film contains at least one of hafnium, zirconium, lanthanum, cerium, praseodymium, neodymium yttrium and aluminum.

8. The method of claim 1 , wherein a partial pressure of an oxygen gas or an oxygen compound gas is controlled during step f).

9. The method of claim 1 , wherein the atmosphere used in step f) includes a nitrogen gas or an inert gas.

10. A method for forming a semiconductor device, comprising the steps of:

a) forming a high dielectric insulating film on a substrate;

b) forming a conductive film on the high dielectric insulating film;

c) irradiating a light onto the substrate having the high dielectric insulating film and the conductive film;

d) forming a gate insulating film and a gate electrode by removing a part of the high dielectric insulating film and the conductive film after step c),

e) forming a side wall on a side face of the gate insulating film; and

f) forming a source/drain region below the side of the gate insulating film in the substrate.

11. The method of claim 10 , wherein a crystal defect of the high dielectric insulating film is reduced during step c).

12. The method of claim 10 , wherein the light has a wavelength of 0.4 μm or less.

13. The method of claim 10 , wherein the conductive film contains titanium nitride.

14. The method of claim 11 , wherein the substrate is heated to about 100 to 500° C. during,step f.).

15. The method of claim 10 , wherein the high dielectric insulating film contains at least one of hafnium, zirconium, lanthanum, cerium, praseodymium, neodymium, yttrium and aluminum.

16. The method of claim 10 , wherein a partial pressure of an oxygen gas or an oxygen compound gas is controlled during step c).

17. The method of claim 10 , wherein the conductive film has a temperature of 850 to 950° C. during step c).

18. A method for forming a semiconductor device, comprising the steps of:

a) forming a high dielectric insulating film on a lower capacitor electrode;

b) irradiating a light on the high dielectric insulating film so as to reduce a crystal defect; and

c) forming an upper capacitor electrode on the high dielectric insulating film after step b), wherein the high dielectric insulating film is a capacitor insulating film.

19. The method of claim 18 , wherein the lower capacitor electrode is formed in the substrate.

20. The method of claim 19 , wherein the lower capacitor electrode is placed in the region between trench isolations.

21. The method of claim 18 , wherein the substrate is heated to about 300° C. during step b).

22. The method of claim 18 , wherein the high dielectric insulating film contains at least one of hafnium, zirconium, lanthanum, cerium, praseodymium, neodymium, yttrium, and aluminum.

23. The method of claim 18 , wherein a partial pressure of an oxygen gas or an oxygen compound gas is controlled during step b).

24. The method of claim 18 , wherein the light has a wavelength of 0.4 μm or less.

Assignments (9)
RELEASE OF SECURITY INTEREST Recorded Oct 26, 2020
From: JEFFERIES FINANCE LLC
To: RPX CORPORATION
Reel/Frame 054486/0422 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 7, 2020
From: RPX CORPORATION
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 051842/0494 →
RELEASE OF LIEN ON PATENTS Recorded Oct 21, 2019
From: JEFFERIES FINANCE LLC, AS COLLATERAL AGENT
To: RPX CORPORATION
Reel/Frame 050777/0983 →
SECURITY INTEREST Recorded Jun 29, 2018
From: RPX CORPORATION
To: JEFFERIES FINANCE LLC
Reel/Frame 046486/0433 →
RELEASE (REEL 038041 / FRAME 0001) Recorded Jan 2, 2018
From: JPMORGAN CHASE BANK, N.A.
To: RPX CORPORATION; RPX CLEARINGHOUSE LLC
Reel/Frame 044970/0030 →
SECURITY AGREEMENT Recorded Mar 9, 2016
From: RPX CORPORATION; RPX CLEARINGHOUSE LLC
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038041/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 5, 2014
From: PANASONIC CORPORATION (FORMERLY KNOWN AS MATSUSHITA ELECTRIC INDUSTRIAL, CO., LTD.)
To: RPX CORPORATION
Reel/Frame 032826/0585 →
CHANGE OF NAME Recorded Jan 10, 2014
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 031961/0079 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 16, 2003
From: KUBOTA, MASAFUMI; HAYASHI, SHIGENORI
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 014516/0086 →