IP Library Assignment 031961/0079
Patent Assignment
Reel/Frame 031961/0079

Change of Name

Recorded: 2014-01-10 Pages: 5
Assignor
Assignee
PANASONIC CORPORATION
1006, OAZA KADOMA, KADOMA-SHI, OSAKA, 571-8501, JAPAN
Covered Properties (53)
Semiconductor Device and Method of Fabricating the Same
Patent: 6,432,803 →
Application: 09/452,460 →
Method of Fabricating Semiconductor Device
Patent: 6,455,436 →
Application: 09/479,243 →
Method of manufacturing a semiconductor device
Patent: 6,376,373 →
Application: 09/523,985 →
Method of Fabricating Semiconductor Device
Patent: 6,436,747 →
Application: 09/551,541 →
Semiconductor device and method of fabricating the same
Patent: 6,300,242 →
Application: 09/560,299 →
Method for Fabricating a Semiconductor Device
Patent: 6,436,786 →
Application: 09/570,545 →
Method for Forming Interlayer Dielectric Film
Patent: 6,458,720 →
Application: 09/625,187 →
Semiconductor Device and Method for Fabricating the Same
Patent: 6,624,076 →
Application: 09/672,860 →
Method of Forming Electrode Structure and Method of Fabricating Semiconductor Device
Patent: 6,451,690 →
Application: 09/679,617 →
Method of Forming Electrode Structure and Method of Fabricating Semiconductor Device
Patent: 6,509,254 →
Application: 09/680,053 →
Capacitance Element and Method of Manufacturing the Same
Patent: 6,562,677 →
Application: 09/689,840 →
Semiconductor Device and Method for Fabricating the Same
Patent: 6,518,169 →
Application: 09/708,082 →
High-Voltage Semiconductor Device
Patent: 6,750,506 →
Application: 09/736,230 →
Publication: US 2001/0004124
Semiconductor Misfet
Patent: 6,518,636 →
Application: 09/759,300 →
Publication: US 2001/0020707
Multilayer Wiring Structure of Semiconductor Device, Method of Producing Said Multilayer Wiring Structure and Semiconductor Device to Be Used for Reliability Evaluation
Patent: 6,580,176 →
Application: 09/760,640 →
Publication: US 2001/0004551
Method for Etching Organic Film, Method for Fabricating Semiconductor Device and Pattern Formation Method
Patent: 6,531,402 →
Application: 09/798,912 →
Publication: US 2001/0046781
Semiconductor Device and Method for Fabricating the Same
Patent: 6,365,959 →
Application: 09/840,883 →
Publication: US 2001/0045623
Interconnect Structure and Method for Forming the Same
Patent: 6,710,451 →
Application: 09/845,325 →
Publication: US 2001/0026019
Semiconductor Device and Method for Fabricating the Same
Patent: 6,531,729 →
Application: 09/855,773 →
Publication: US 2001/0023977
Method for Fabricating Semiconductor Device
Patent: 7,037,371 →
Application: 09/856,823 →
Semiconductor Device and Method for Fabricating the Same
Patent: 6,589,827 →
Application: 09/911,618 →
Publication: US 2002/0019101
Production Method for Semiconductor Crystal
Patent: 6,649,496 →
Application: 09/979,258 →
Publication: US 2002/0160605
Semiconductor Device
Patent: 6,642,607 →
Application: 10/061,365 →
Publication: US 2002/0135009
Method of Fabricating Semiconductor Device
Patent: 6,780,779 →
Application: 10/222,855 →
Publication: US 2003/0003741
Method for Forming a Semiconductor Device
Patent: 6,955,973 →
Application: 10/314,159 →
Publication: US 2003/0109114
Semiconductor Device and Method for Fabricating the Same
Patent: 6,962,853 →
Application: 10/337,338 →
Publication: US 2003/0134517
Method for measuring temperature, annealing method and method for fabricating semiconductor device
Patent: 7,037,733 →
Application: 10/343,762 →
Publication: US 2004/0023421
Method for Fabricating Electronic Device
Patent: 7,022,619 →
Application: 10/395,182 →
Publication: US 2003/0186537
Semiconductor Device and Method for Fabricating the Same
Patent: 6,710,382 →
Application: 10/428,920 →
Publication: US 2003/0203554
Multilayer Wiring Structure of Semiconductor Device, Method of Producing Said Multilayer Wiring Structure and Semiconductor Device to Be Used for Reliability Evaluation
Patent: 6,815,338 →
Application: 10/443,826 →
Publication: US 2004/0092097
Electric Device and Method for Fabricating the Same
Patent: 7,057,288 →
Application: 10/459,616 →
Publication: US 2003/0235979
Manufacturing Method for an Electronic Device, and the Electronic Device
Patent: 7,052,624 →
Application: 10/621,502 →
Publication: US 2004/0058535
Production Method of Semiconductor Device
Patent: 7,001,841 →
Application: 10/643,980 →
Publication: US 2004/0175936
Method for Fabricating Semiconductor Device
Patent: 7,094,639 →
Application: 10/662,288 →
Publication: US 2004/0087124
Composition for Forming Porous Film, Porous Film and Method for Forming the Same, Interlevel Insulator Film, and Semiconductor Device
Patent: 7,132,473 →
Application: 10/706,862 →
Publication: US 2004/0219372
Semiconductor Device and Method for Fabricating the Same
Patent: 7,015,554 →
Application: 10/756,465 →
Publication: US 2004/0183141
Method for Fabricating Semiconductor Device and Semiconductor Device
Patent: 7,098,154 →
Application: 10/774,522 →
Publication: US 2004/0227196
Multilayer Wiring Structure of Semiconductor Device, Method of Producing Said Multilayer Wiring Structure and Semiconductor Device to Be Used for Reliability Evaluation
Patent: 7,148,572 →
Application: 10/837,596 →
Publication: US 2004/0201104
Semiconductor Device and Method for Fabricating the Same
Patent: 7,067,382 →
Application: 10/853,128 →
Publication: US 2005/0003621
Method and Apparatus for Detecting End Point
Patent: 7,026,173 →
Application: 10/858,402 →
Publication: US 2005/0054123
Semiconductor Memory Device
Patent: 6,999,367 →
Application: 10/917,308 →
Publication: US 2005/0047220
Method for Forming Metal Interconnect in a Carbon Containing Silicon Oxide Film
Patent: 7,030,009 →
Application: 10/942,953 →
Publication: US 2005/0032358
Semiconductor Device and Method for Fabricating the Same
Patent: 7,144,761 →
Application: 10/958,282 →
Publication: US 2005/0059231
Method and Apparatus for Fabricating Semiconductor Device
Patent: 7,291,535 →
Application: 11/000,209 →
Publication: US 2005/0130382
Semiconductor Device Including Fine Dummy Patterns
Patent: 7,233,052 →
Application: 11/082,853 →
Publication: US 2005/0161824
Method and Apparatus for Detecting End Point
Patent: 7,377,992 →
Application: 11/340,540 →
Publication: US 2006/0189006
Multilayer Wiring Structure of Semiconductor Device, Method of Producing Said Multilayer Wiring Structure and Semiconductor Device to Be Used for Reliability Evaluation
Patent: 7,443,031 →
Application: 11/582,982 →
Publication: US 2007/0037453
Multilayer Wiring Structure of Semiconductor Device, Method of Producing Said Multilayer Wiring Structure and Semiconductor Device to Be Used for Reliability Evaluation
Patent: 7,642,654 →
Application: 12/236,914 →
Publication: US 2009/0111262
Method for Fabricating a Semiconductor Device
Patent: 7,932,187 →
Application: 12/368,693 →
Publication: US 2009/0149019
Semiconductor Device and Method for Fabricating the Same
Patent: 7,851,891 →
Application: 12/424,894 →
Publication: US 2009/0206454
Multilayer Wiring Structure of Semiconductor Device, Method of Producing Said Multilayer Wiring Structure and Semiconductor Device to Be Used for Reliability Evaluation
Patent: 7,911,060 →
Application: 12/631,592 →
Publication: US 2010/0078827
Method for Forming Inlaid Interconnect
Patent: 7,816,267 →
Application: 12/632,397 →
Publication: US 2010/0087059
Multilayer Wiring Structure of Semiconductor Device, Method of Producing Said Multilayer Wiring Structure and Semiconductor Device to Be Used for Reliability Evaluation
Patent: 8,110,495 →
Application: 13/022,950 →
Publication: US 2011/0129995
Related Assignments (17)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Jan 10, 2014
From: YUASA, HIROSHI; UEDA, SATOSHI
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 031934/0136 →
Assignment of Assignor's Interest Jan 10, 2014
From: AOI, NOBUO
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 031934/0113 →
Assignment of Assignor's Interest Jan 14, 2014
From: MIKAWA, TAKUMI; JUDAI, YUJI; NAGANO, YOSHIHISA
To: MATSUSHITA ELECTRONICS CORPORATION
Reel/Frame 031956/0765 →
Assignment of Assignor's Interest Jan 14, 2014
From: TSUZUMITANI, AKIHIKO; OKUNO, YASUTOSHI; MORI, YOSHIHIRO
To: MATSUSHITA ELECTRONICS CORPORATION
Reel/Frame 031956/0772 →
Assignment of Assignor's Interest Jan 14, 2014
From: DOMAE, SHINICHI; MASUDA, HIROSHI; KATO, YOSHIAKI; YANO, KOUSAKU
To: MATSUSHITA ELECTRONICS CORPORATION
Reel/Frame 031956/0680 →
Merger Jan 16, 2014
From: MATSUSHITA ELECTRONICS CORPORATION
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 031979/0894 →
Assignment of Assignor's Interest May 5, 2014
From: PANASONIC CORPORATION (FORMERLY KNOWN AS MATSUSHITA ELECTRIC INDUSTRIAL, CO., LTD.)
To: RPX CORPORATION
Reel/Frame 032826/0585 →
Security Agreement Mar 9, 2016
From: RPX CORPORATION; RPX CLEARINGHOUSE LLC
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038041/0001 →
Release (Reel 038041 / Frame 0001) Jan 2, 2018
From: JPMORGAN CHASE BANK, N.A.
To: RPX CORPORATION; RPX CLEARINGHOUSE LLC
Reel/Frame 044970/0030 →
Security Interest Jun 29, 2018
From: RPX CORPORATION
To: JEFFERIES FINANCE LLC
Reel/Frame 046486/0433 →
Release of Lien on Patents Oct 21, 2019
From: JEFFERIES FINANCE LLC, AS COLLATERAL AGENT
To: RPX CORPORATION
Reel/Frame 050777/0983 →
Release of Lien on Patents Dec 12, 2019
From: JEFFERIES FINANCE LLC, AS COLLATERAL AGENT
To: RPX CORPORATION
Reel/Frame 051261/0517 →
Assignment of Assignor's Interest Dec 25, 2019
From: RPX CORPORATION
To: UNITED MICROELECTRONICS CORP.
Reel/Frame 051364/0328 →
Assignment of Assignor's Interest Feb 7, 2020
From: RPX CORPORATION
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 051842/0494 →
Patent Security Agreement Oct 23, 2020
From: RPX CLEARINGHOUSE LLC; RPX CORPORATION
To: BARINGS FINANCE LLC, AS COLLATERAL AGENT
Reel/Frame 054198/0029 →
Patent Security Agreement Oct 23, 2020
From: RPX CLEARINGHOUSE LLC; RPX CORPORATION
To: BARINGS FINANCE LLC, AS COLLATERAL AGENT
Reel/Frame 054244/0566 →
Release of Security Interest Oct 26, 2020
From: JEFFERIES FINANCE LLC
To: RPX CORPORATION
Reel/Frame 054486/0422 →