IP Library Granted Patent US 6,962,853
Granted Patent B2
US 6,962,853 · App. 10/337,338 · Granted Nov 8, 2005

Semiconductor device and method for fabricating the same

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Quick Facts
Patent No.
US 6,962,853
App. No.
10/337,338
Granted
Nov 8, 2005
Kind
B2
Abstract

A conductive film for gate electrode including a polysilicon film is deposited on a semiconductor substrate, and patterned to form gate electrodes. An oxide film is formed on each side face of at least the polysilicon film, and by nitriding at least the surface portion of the oxide film, a nitride oxide film is formed on each side face of the gate electrodes. An interlayer insulating film is then deposited, and contact holes are formed through the interlayer insulating film. The existence of the nitride oxide film suppresses variation and reduction in size due to oxidation and etching of the gate side faces during resist removal and washing.

Claims (22)

1. A method for fabricating a semiconductor device, comprising the steps of:

(a) depositing a conductive film for gate electrode including at least a polysilicon film on a semiconductor substrate;

(b) forming a gate electrode by patterning the conductive film for gate electrode;

(c) forming an oxide film on a side face of at least the polysilicon film after the step (b);

(d) forming a nitride oxide film on a side face of the gate electrode by nitriding only a surface portion of the oxide film after the step (c); and

(e) forming an insulating sidewall on the nitride oxide film provided on the surface portion of the oxide film on the side face of the gate electrode after the step (d),

wherein in the step (a), a polysilicon film and a metal film are deposited in this order as the conductive film for gate electrode,

in the step (b), a bottom gate electrode made of the polysilicon film and a top gate electrode made of the metal film are formed as the gate electrode, and

in the step (d), simultaneously with the formation of the nitride oxide film by nitriding at least a surface portion of the oxide film formed on each side face of the bottom gate electrode, each side face of the top gate electrode is nitrided to form a metal nitride film.

2. The method of claim 1 , wherein in the step (c), a plasma oxide film is formed as the oxide film by subjecting each side face of the polysilicon film to oxygen plasma treatment.

3. The method of claim 2 , wherein the step (b), the conductive film for gate electrode is patterned by etching using as a mask a photoresist film covering gate electrode formation areas of the conductive film for gate electrode, and

in the step (c), the plasma oxide film is formed by oxidizing each side face of the polysilicon film simultaneously with removal of the photoresist film by ashing with oxygen plasma.

4. The method of claim 1 , wherein in the step (a), a first insulating film having an etching stopper function is deposited on the conductive film for gate electrode,

in the step (b), a gate top insulating film made of the first insulating film is formed on the gate electrode, and

the method further comprises, after the step (d), the step of depositing a second insulating film having an etching stopper function on the substrate and etching back the second insulating film to form a side wall made of the second insulating film on each side face of the gate electrode and each side face of the gate top insulating film.

5. The method of claim 1 , wherein the insulating sidewall is composed of a silicon nitride film.

6. A method for fabricating a semiconductor device, comprising the steps of:

(a) depositing, on a semiconductor substrate, a conductive film composed of a polysilicon film as a lower film and a metal film as an upper film;

(b) forming a gate electrode by patterning the conductive film;

(c) forming an oxide film on a side face of the polysilicon film after the step (b); and

(d) forming a nitride oxide film by nitriding a side portion of the oxide film formed on the side face of the polysilicon film, and a metal nitride film by nitriding a side portion of the metal film after the step (c),

wherein in the step (b), the gate electrode is formed including a lower gate electrode composed of the polysilicon film and an upper gate electrode composed of the metal film.

Assignments (10)
RELEASE OF SECURITY INTEREST Recorded Oct 26, 2020
From: JEFFERIES FINANCE LLC
To: RPX CORPORATION
Reel/Frame 054486/0422 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 7, 2020
From: RPX CORPORATION
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 051842/0494 →
RELEASE OF LIEN ON PATENTS Recorded Oct 21, 2019
From: JEFFERIES FINANCE LLC, AS COLLATERAL AGENT
To: RPX CORPORATION
Reel/Frame 050777/0983 →
SECURITY INTEREST Recorded Jun 29, 2018
From: RPX CORPORATION
To: JEFFERIES FINANCE LLC
Reel/Frame 046486/0433 →
RELEASE (REEL 038041 / FRAME 0001) Recorded Jan 2, 2018
From: JPMORGAN CHASE BANK, N.A.
To: RPX CORPORATION; RPX CLEARINGHOUSE LLC
Reel/Frame 044970/0030 →
SECURITY AGREEMENT Recorded Mar 9, 2016
From: RPX CORPORATION; RPX CLEARINGHOUSE LLC
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038041/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 5, 2014
From: PANASONIC CORPORATION (FORMERLY KNOWN AS MATSUSHITA ELECTRIC INDUSTRIAL, CO., LTD.)
To: RPX CORPORATION
Reel/Frame 032826/0585 →
MERGER Recorded Jan 16, 2014
From: MATSUSHITA ELECTRONICS CORPORATION
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 031979/0894 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 14, 2014
From: SEGAWA, MIZUKI; UEHARA, TAKASHI
To: MATSUSHITA ELECTRONICS CORPORATION
Reel/Frame 031956/0775 →
CHANGE OF NAME Recorded Jan 10, 2014
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 031961/0079 →