IP Library Granted Patent US 7,030,009
Granted Patent B2
US 7,030,009 · App. 10/942,953 · Granted Apr 18, 2006

Method for forming metal interconnect in a carbon containing silicon oxide film

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Quick Facts
Patent No.
US 7,030,009
App. No.
10/942,953
Granted
Apr 18, 2006
Kind
B2
Abstract

An insulating film is formed of a carbon-containing silicon dioxide film on a semiconductor substrate. In the insulating film, an interconnect groove is formed. A silicon dioxide layer with a density high enough to allow almost no oxygen to pass therethrough is formed on the bottom and side faces of the interconnect groove. And a metal interconnect is formed on the silicon dioxide layer inside the interconnect groove.

Claims (13)

1. A method for forming a semiconductor device, comprising the steps of:

a) forming an insulating film of a carbon-containing silicon oxide film over a substrate;

b) etching the insulating film using a resist pattern as a mask, thereby forming an interconnect groove in the insulating film;

c) filling the interconnect groove with a resist film;

d) performing an etching process, thereby removing a first region of the resist film, existing outside the interconnect groove, and the resist, pattern,

e) removing a second region of the resist film, still existing inside the interconnect groove,

f) depositing a metal film on the interconnect groove,

g) filling the interconnect grove with the metal, followed by removing metal film outside the interconnect and a surface film of the insulating film.

2. The method of claim 1 , further comprising a step of forming the surface film on the insulating film when the second region of the resist film inside the interconnect groove is removed.

3. The method of claim 1 , wherein the etching process uses an etching gas containing oxygen.

4. The method of claim 1 , wherein the etching process is carried out by a down flow technique in a vacuum of 13.3 Pa or less.

5. The method of claim 1 , wherein the metal film is made up of a barrier metal layer and a main interconnect layer.

6. The method of claim 5 , wherein the barrier metal is a tantalum nitride and the main interconnect layeris copper.

Assignments (5)
RELEASE (REEL 038041 / FRAME 0001) Recorded Jan 2, 2018
From: JPMORGAN CHASE BANK, N.A.
To: RPX CORPORATION; RPX CLEARINGHOUSE LLC
Reel/Frame 044970/0030 →
SECURITY AGREEMENT Recorded Mar 9, 2016
From: RPX CORPORATION; RPX CLEARINGHOUSE LLC
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038041/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 5, 2014
From: PANASONIC CORPORATION (FORMERLY KNOWN AS MATSUSHITA ELECTRIC INDUSTRIAL, CO., LTD.)
To: RPX CORPORATION
Reel/Frame 032826/0585 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 10, 2014
From: YUASA, HIROSHI
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 031934/0193 →
CHANGE OF NAME Recorded Jan 10, 2014
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 031961/0079 →