Masking of factorized data in a residue number system
A method and a circuit for masking digital data handled by an algorithm and factorized by a residue number system based on a finite base of numbers or polynomials prime to one another, comprising making the factorization base variable.
1. A method for masking digital data processed by a circuit executing an encryption algorithm comprising:
calculating a plurality of factorizations of at least two input data based on a variable factorization base, the variable factorization base being comprised of elements prime to one another;
performing elementary operations on the plurality of factorizations to calculate a result factorization; and
combining the result factorization based on the variable factorization base to obtain a result.
2. The method of claim 1 , wherein the elements of the variable factorization base are chosen from a look-up table of sets of numbers or polynomials prime to one another.
3. The method of claim 2 , wherein the elements of the variable factorization base are randomly selected from the look-up table for each new application of the algorithm.
4. The method of claim 1 , wherein the elements of the factorization base are calculated by a pseudo-random generator.
5. The method of claim 1 , wherein the elements of the variable factorization base are chosen to be compatible with the input data.
6. The method of claim 1 , wherein the at least two input data are at least two factorizations calculated based on a different factorization base, and wherein the result is a factorization in the different factorization base.
7. The method of claim 6 , wherein the different factorization base is a variable factorization base.
8. The method of claim 1 , wherein the at least two input data are not yet factorized.
9. The method of claim 1 , wherein the at least two input data are at least two integers.
10. A circuit comprising:
a circuit to select a variable factorization base, the variable factorization base being comprised of elements prime to one another;
at least one circuit to calculate factorizations of input data based on the variable factorization base;
a circuit to perform elementary operations on the factorizations to calculate a result factorization;
a circuit to combine the result factorization based on the variable factorization base to obtain a result.
11. The circuit of claim 10 , wherein the circuit to select a variable factorization base comprises a memory to store a look-up table of sets of numbers or polynomials prime to one another from which the elements of the variable factorization base are selected.
12. The circuit of claim 10 , further comprising a circuit for confirming that the variable factorization base is compatible with the input data.
13. The method of claim 10 , wherein the circuit to select a variable factorization base comprises a pseudo-random generator.
14. A circuit comprising:
means for selecting a variable factorization base, the variable factorization base being comprised of elements prime to one another;
at least one circuit to calculate factorizations of input data based on the variable factorization base;
a circuit to perform elementary operations on the factorizations to calculate a result factorization; and
a circuit to combine the result factorization based on the variable factorization base to obtain a result.
15. The circuit of claim 14 , wherein the means for selecting comprises a means for storing a look-up table of sets of numbers or polynomials prime to one another from which the elements of the factorization base are selected.
16. The circuit of claim 14 , wherein the means for selecting comprises means for pseudo-randomly generating the elements of the variable factorization base.