IP Library Granted Patent US 6,984,554
Granted Patent B2
US 6,984,554 · App. 10/666,434 · Granted Jan 10, 2006

Transistor with group III/VI emitter

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Quick Facts
Patent No.
US 6,984,554
App. No.
10/666,434
Granted
Jan 10, 2006
Kind
B2
Abstract

A transistor includes a base, a collector, and an emitter comprising a group III/VI semiconductor. Microcircuits having at least one metal oxide semiconductor (MOS) transistor and the previously described transistor are provided. Processes for manufacturing a transistor and a BiMOS microcircuit are also provided.

Claims (24)

1. A process for manufacturing a BiMOS microcircuit, comprising:

forming a buried layer of a first semiconductor material;

forming a gate oxide for at least one MOS transistor;

forming a poly-Si layer on the gate oxide;

forming a base of a second semiconductor material;

forming a source and a drain for the MOS transistor of a third semiconductor material; and

forming an emitter of a group III/VI semiconductor on the base, the group III/VI semiconductor selected from the group consisting of GaS, GaSe, GaTe, InS, InSe, InTe, and TIS.

2. The process of claim 1 , further comprising:

after forming the buried layer, isolating the buried layer into pockets.

3. The process of claim 1 , further comprising forming a deep N+collector.

4. The process of claim 1 , further comprising:

utilizing part of the buried layer as a collector; and

forming contacts to the base, emitter, collector, source, drain, and poly-Si layer on the gate oxide.

5. The process of claim 1 , further comprising forming wells of the second semiconductor material in the buried layer.

6. A process for manufacturing a heterojunction bipolar transistor (HBT), comprising:

forming a collector of a first semiconductor;

forming a base of a second semiconductor; and

forming an emitter of a group III/VI semiconductor selected from the group consisting of GaS, GaSe, GaTe, InS, InSe, InTe, and TIS.

7. A process for manufacturing a transistor, comprising:

forming a base;

forming a collector; forming an emitter of a group III/VI semiconductor selected from the group consisting of GaS, GaSe, GaTe, InS, InSe, InTe, and TIS; and

forming an emitter contact coupled to the emitter.

8. The process of claim 7 , wherein forming a base comprises forming a base of a p-type semiconductor material and forming a collector comprises forming a collector of an n-type semiconductor material.

9. The process of claim 7 , wherein forming a base comprises forming a base of an n-type semiconductor and forming a collector comprises forming a collector of a p-type semiconductor and further comprising doping the group III/VI semiconductor to behave as a p-type semiconductor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 26, 2011
From: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.; HEWLETT-PACKARD COMPANY
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 026198/0139 →