Test method of memory IC function on device board with dynamic competing cycle
View Patent ↗In a test method of a memory IC function, memory ICs of different types are prepared after a memory tester is prepared. The data related to each test method of these memory ICs is transmitted to the memory tester. Further, after a random number is generated, a test of a predetermined memory IC is executed in reply to the generated random number. It is checked whether the tests of all the memory ICs are finished or not: and the generation of the random number and the execution of the test are repeated when they are not finished, while the processing is finished when they are finished.
1. A test method of a memory IC function, comprising:
preparing a memory tester;
preparing memory ICs of different types;
transmitting data related to each test method of the memory ICs to the memory tester;
generating a random number indicative of a period of time;
executing a test of a predetermined memory IC for the period of time in accordance with the generated random number;
judging whether tests of all the memory ICs are finished or not;
repeating said generating a random number and said executing a test if tests of all the memory ICs are not finished; and
ending processing if tests of all the memory ICs are finished.
2. The test method of a memory IC function, according to claim 1 , wherein the random number is an arbitrary integer from 0 to 255.
3. The test method of a memory IC function, according to claim 1 , wherein the memory ICs include Flash ROM, SRAM, and SDRAM.
4. The test method of a memory IC function, according to claim 1 , further comprising performing timer interruption processing after said executing a test.
5. The test method of a memory IC function, according to claim 4 , wherein the timer interruption processing is performed with a predetermined cycle.
6. The test method of a memory IC function, according to claim 5 , wherein the predetermined cycle is in a range of milliseconds.
7. A test method of a memory IC function, comprising:
preparing a memory tester;
preparing ICs of different types;
transmitting data related to each test method of the ICs to the memory tester;
generating a random number;
executing a test of a predetermined IC based on the generated random number;
judging whether tests of all the ICs are finished or not;
repeating said generating a random number and said executing a test if tests of all the ICs are not finished; and
ending processing if tests of all the ICs are finished,
wherein the ICs include a memory IC, a communication interface IC, and a CPU peripheral IC, and wherein the memory IC includes Flash ROM, SRAM, and SDRAM.
8. The test method of a memory IC function, according to claim 7 , wherein the random number is an arbitrary integer from 0 to 255.
9. The test method of a memory IC function, according to claim 7 , wherein the communication interface IC is an IC including a UART interface and a universal serial bus interface.
10. The test method of a memory IC function, according to claim 7 , further comprising performing timer interruption processing after said executing a test.
11. The test method of a memory IC function, according to claim 10 , wherein the timer interruption processing is performed with a predetermined cycle.
12. The test method of a memory IC function, according to claim 11 , wherein the predetermined cycle is in a range of milliseconds.
13. A test method of a memory IC function, comprising:
preparing a memory tester;
preparing ICs of different types;
transmitting data related to each test method of the ICs to the memory tester;
generating a random number;
executing a test of a predetermined IC based on the generated random number;
judging whether tests of all the ICs are finished or not;
repeating said generating a random number and said executing a test if tests of all the ICs are not finished; and
ending processing if tests of all the ICs are finished,
wherein the ICs include a memory IC, a communication interface IC, and a CPU peripheral IC, and wherein the CPU peripheral IC is an IC including DMAC.
14. The test method of a memory IC function according to claim 13 , wherein the random number is an arbitrary integer from 0 to 255.
15. The test method of a memory IC function, according to claim 13 , wherein the communication interface IC is an IC including a UART interface and a universal serial bus interface.
16. The test method of a memory IC function, according to claim 13 , further comprising performing timer interruption processing after said executing a test.
17. The test method of a memory IC function, according to claim 16 , wherein the timer interruption processing is performed with a predetermined cycle.
18. The test method of a memory IC function, according to claim 17 , wherein the predetermined cycle is in a range of milliseconds.