IP Library Granted Patent US 7,346,640
Granted Patent B2
US 7,346,640 · App. 10/671,907 · Granted Mar 18, 2008

Image processing apparatus supporting both discrete cosine transform and discrete wavelet transform

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Quick Facts
Patent No.
US 7,346,640
App. No.
10/671,907
Granted
Mar 18, 2008
Kind
B2
Abstract

An image processing apparatus supporting both discrete wavelet transform and discrete cosine transform with reduced hardware resources. The image processing apparatus is composed of an input unit receiving a plurality of pixel data, a controlling unit selecting a desired transform from among discrete wavelet transform and discrete cosine transform, and providing a plurality of coefficients depending on the desired transform, and a processing unit which processes the pixel data using the plurality of coefficients to achieve the desired transform.

Claims (22)

1. An image processing apparatus comprising:

an input unit for receiving a plurality of pixel data, wherein said input unit includes:

a plurality of flipflops which respectively stores therein one of said plurality of pixel data,

a rearrangement unit for receiving said plurality of pixel data from said plurality of flipflops and rearranging said received pixel data so as to be adaptive to said desired transform in response to a control signal received from said control unit,

wherein said processing unit includes:

a plurality of adders, each receiving two of said plurality of pixel data selected by said rearrangement unit to calculate a sum of said received two pixel data,

a plurality of multipliers, each calculating a product of associated one of said sums and associated one of said plurality of said coefficients,

another multiplier receiving one of said plurality of pixel data from one of said flipflops and calculating a product of said received pixel data and associated one of said plurality of said coefficients,

a selector; and

an adder/subtractor unit,

wherein said selector selects one of outputs of said another multiplier and said adder/subtractor unit, and

wherein said adder/subtractor unit executes operation on said products received from said plurality of multipliers and an output of said selector to obtain a result data of said desired transform;

a controlling unit for selecting a desired transform from among discrete wavelet transform and discrete cosine transform, and providing a plurality of coefficients depending on said desired transform; and

a processing unit for processing said pixel data using said plurality of coefficients to achieve said desired transform.

2. The image processing apparatus according to claim 1 , wherein said input unit includes:

a storage unit for storing said pixel data; and

a rearrangement unit for receiving and rearranging said pixel data so as to be adaptive to said desired transform in response to a control signal received from said control unit;

wherein said processing unit processes said rearranged pixel data to achieve said desired transform.

3. The image processing apparatus according to claim 1 , wherein said controlling unit selects one procedure from among encoding and decoding through said desired transform, and develops said plurality of coefficients depending on said selected procedure.

4. The image processing apparatus according to claim 2 , wherein said controlling unit selects one procedure from among encoding and decoding through said desired transform, and develops said control signal to allow said rearrangement unit to be adaptive to said selected procedure.

5. The image processing apparatus according to claim 1 , wherein said controlling unit selects one of an irreversible 9/7 filter and a reversible 5/3 filter to be used when selecting said discrete wavelet transform, and develops said plurality of coefficients depending on said selected filter.

6. The image processing apparatus according to claim 2 , wherein said controlling unit selects one of an irreversible 9/7 filter and a reversible 5/3 filter to be used when selecting said discrete wavelet transform, and develops said control signal to allow said rearrangement unit to be adaptive to said selected procedure.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Dec 22, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025525/0136 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 25, 2003
From: KATAYAMA, YOICHI
To: NEC ELECTRONICS CORPORATION
Reel/Frame 014551/0327 →