IP Library Granted Patent US 6,989,301
Granted Patent B2
US 6,989,301 · App. 10/673,217 · Granted Jan 24, 2006

Method for manufacturing semiconductor device

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Quick Facts
Patent No.
US 6,989,301
App. No.
10/673,217
Granted
Jan 24, 2006
Kind
B2
Abstract

The present invention achieves the enhancement of a manufacturing yield factor and the reduction of manufacturing cost in a manufacturing method of a semiconductor device having a hetero junction bipolar transistor (HBT), a Schottky diode and a resistance element. The present invention is directed to the manufacturing method of a semiconductor device in which respective semiconductor layers which become a sub collector layer, a collector layer, a base layer, a wide gap emitter layer and an emitter layer are sequentially formed over one surface of a semiconductor substrate and, thereafter, respective semiconductor layers are processed to form the hetero junction bipolar transistor, the Schottky diode and the resistance element in a monolithic manner. An emitter electrode of the hetero junction bipolar transistor, a Schottky electrode of the Schottky diode and a resistance film of the resistance element are simultaneously formed using a same material (for example, WSiN). Accordingly, the man-hours can be reduced and the manufacturing cost of the semiconductor device can be reduced.

Claims (29)

1. A method for manufacturing a semiconductor device having a hetero-junction bipolar transistor over a semiconductor substrate, comprising the steps of:

(a) preparing a semiconductor substrate having a first semiconductor layer of a first type over the semiconductor substrate, a second semiconductor layer of a second type over the first semiconductor layer, and a third semiconductor layer of the first type over the second semiconductor layer, wherein the first type and the second type are opposite;

(b) forming an emitter electrode of the hetero-junction bipolar transistor over the third semiconductor layer;

(c) after the step (b), forming the third semiconductor layer into a mesa-shaped emitter layer of the hetero-junction bipolar transistor;

(d) after the step (c), forming a base electrode over the second semiconductor layer outside the mesa-shaped emitter layer;

(e) after the step (d), forming a photo resist film over the emitter and base electrodes; and

(f) after the step (e), etching the second semiconductor layer to form a mesa-shaped base layer of the hetero-junction bipolar transistor,

wherein in the step (e), an outer periphery of the base electrode is exposed from the photo resist film; and in the step (f), the photo resist film and base electrode act as an etching mask.

2. A method according to claim 1 , further comprising the steps of:

(g) forming a collector electrode of the hetero-junction bipolar transistor over the first semiconductor layer outside the mesa-shaped base layer; and

(h) forming the first semiconductor layer into a mesa-shaped collector layer of the hetero-junction bipolar transistor.

3. A method according to claim 1 , wherein in the step (f), a wet etching is performed.

4. A method according to claim 3 , wherein the first, the second, and the third semiconductor layers are comprised of GaAs and the base electrode is comprised of Au.

5. A method according to claim 3 , wherein the mesa-shaped collector is comprised of a lower portion and an upper portion, and the collector electrode is electrically connected to the lower portion of the mesa-shaped collector.

6. A method according to claim 1 , wherein the semiconductor device includes a Schottky diode and a resistance element over the semiconductor substrate.

7. A method for manufacturing a semiconductor device having a hetero-junction bipolar transistor over a semiconductor substrate, comprising the steps of:

(a) preparing a semiconductor substrate;

(b) forming a first semiconductor layer of a first type over the semiconductor substrate;

(c) forming a second semiconductor layer of a second type, which is opposite of the first type, over the first semiconductor layer;

(d) forming a third semiconductor layer of the first type over the second semiconductor layer;

(e) forming an emitter electrode of the hetero-junction bipolar transistor over the third semiconductor layer;

(f) after the step (e), forming the third semiconductor layer into a mesa-shaped emitter layer of the hetero-junction bipolar transistor;

(g) after the step (f), forming a base electrode over the second semiconductor layer outside the mesa-shaped emitter layer;

(h) after the step (g), forming a photo resist film over the emitter and base electrodes; and

(i) after the step (h), etching the second semiconductor layer to form a mesa-shaped base layer of the hetero-junction bipolar transistor,

wherein in the step (h), an outer periphery of the base electrode is exposed from the photo resist film; and in the step (i), the photo resist film and base electrode act as an etching mask.

8. A method according to claim 7 , further comprising the steps of:

(j) forming a collector electrode of the hetero-junction bipolar transistor over the first semiconductor layer outside the mesa-shaped base layer; and

(k) forming the first semiconductor layer into a mesa-shaped collector layer of the hetero-junction bipolar transistor.

Assignments (1)
MERGER Recorded Mar 25, 2011
From: RENESAS TECHNOLOGY CORP.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 026109/0269 →