IP Library Granted Patent US 6,905,888
Granted Patent B2
US 6,905,888 · App. 10/676,414 · Granted Jun 14, 2005

Magnetic memory element having controlled nucleation site in data layer

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Quick Facts
Patent No.
US 6,905,888
App. No.
10/676,414
Granted
Jun 14, 2005
Kind
B2
Abstract

A ferromagnetic data layer of a magnetic memory element is formed with a controlled nucleation site. In some embodiments, the nucleation site may be a divot in the data layer or a protrusion from the data layer. A Magnetic Random Access Memory (“MRAM”) device may include an array of magnetic memory elements having data layers with controlled nucleation sites.

Claims (18)

1. A method of fabricating a magnetic memory element, the method comprising forming a ferromagnetic data layer with a controlled nucleation site; the nucleation site being a divot in the data layer or a protrusion from the data layer.

2. The method of claim 1 , wherein the nucleation site is not surrounded by a neighboring region of the data layer.

3. The method of claim 1 , wherein the nucleation site has a lower switching threshold relative to a neighboring region of the data layer.

4. The method of claim 1 , wherein the nucleation site is formed at an edge of the data layer.

5. The method of claim 1 , wherein the nucleation site is formed at a corner of the data layer.

6. The method of claim 1 , wherein the data layer has at least two nucleation sites with a symmetric arrangement.

7. The method of claim 1 , further comprising forming additional magnetic tunnel junction layers.

8. A method of fabricating a magnetic memory element, the method comprising forming a ferromagnetic data layer with a non-symmetric arrangement of controlled nucleation sites, the nucleation sites having a uniform size and shape.

9. A method of fabricating a data storage device, the method comprising forming an array of square or rectangular ferromagnetic data layers, each layer having first and second neighboring regions, the first regions having a lower switching threshold than the second regions and a substantially smaller size than the second regions, the first regions at the same location on the data layers across the array.

10. The method of claim 9 , wherein the first regions are located at comers of the data layers.

11. The method of claim 9 , wherein the first regions are located at edges of the data layers.

12. The method of claim 9 , wherein the first regions are either divots in the data layers or protrusion from the data layers.

13. The method of claim 9 , wherein each data layer has more than one first region.

14. The method of claim 13 , wherein each data layer has a symmetric arrangement of first regions.

15. The method of claim 13 , wherein each data layer has a non-symmetric arrangement of first regions.

16. The method of claim 9 , wherein the first regions have a uniform size and shape across the array.

17. The method of claim 9 , wherein the first regions are formed during bit formation.

18. The method of claim 9 , further comprising forming additional magnetic tunnel junction layers.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 22, 2007
From: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 019733/0030 →