Integrated circuit incorporating flip chip and wire bonding
View Patent ↗An integrated circuit incorporates flip chip and wire bonding techniques to provide an improved integrated circuit device. The integrated circuit device includes a package having a first plurality of bonding pads and a semiconductor substrate within the integrated circuit package and including a second plurality of bonding pads. A semiconductor substrate has a surface area. A plurality of wire bonds connect the first plurality of bonding pads to the second plurality of bonding pads. The device further includes an interconnection substrate mounted on the semiconductor substrate. The interconnection substrate has a surface area smaller than the semiconductor substrate surface area.
1. An integrated circuit comprising:
an integrated circuit package having a first plurality of bonding pads;
a semiconductor substrate within the integrated circuit package, including a circuit and a second plurality of bonding pads, and having a surface area;
a plurality of wire bonds connecting selected ones of the first plurality of bonding pads to selected ones of the second plurality of bonding pads; and
an interconnection substrate mounted on the semiconductor substrate, the interconnection substrate having a surface area smaller than the semiconductor substrate surface area wherein the semiconductor substrate includes peripheral areas about the interconnect substrate and wherein at least some of the second plurality of bonding pads are within the peripheral areas.
2. The integrated circuit of claim 1 wherein the interconnection substrate is flip chip bonded to the semiconductor substrate.
3. The integrated circuit of claim 1 wherein the interconnection substrate is formed from one of an organic material, ceramic, and silicon.
4. The integrated circuit of claim 1 wherein the interconnection substrate further includes at least one filter capacitor.
5. The integrated circuit of claim 1 wherein the integrated circuit package includes a cavity and wherein the semiconductor substrate is adhered to the package within the cavity.
6. The integrated circuit of claim 1 wherein the integrated circuit package includes a substrate and wherein the first plurality of bond pads and the semiconductor substrate are carried by the integrated circuit package substrate.
7. An integrated circuit comprising:
an integrated circuit package having a first plurality of bonding pads;
a semiconductor substrate within the integrated circuit package, including a circuit and a second plurality of bonding pads, and having a surface area;
a plurality of wire bonds connecting selected ones of the first plurality of bonding pads to selected ones of the second plurality of bonding pads; and
an interconnection substrate flip chip mounted on the semiconductor substrate, the interconnection substrate having a surface area smaller than the semiconductor substrate surface area forming exposed peripheral areas in the semiconductor substrate and wherein
the second plurality of bonding pads are within the peripheral areas.
8. The integrated circuit of claim 7 wherein the interconnection substrate is formed from one of an organic material, ceramic, and silicon.
9. The integrated circuit of claim 7 wherein the interconnection substrate further includes at least one filter capacitor.
10. The integrated circuit of claim 7 wherein the integrated circuit package includes a cavity and wherein the semiconductor substrate is adhered to the package within the cavity.
11. The integrated circuit of claim 7 wherein the integrated circuit package includes a substrate and wherein the first plurality of bond pads and the semiconductor substrate are carried by the integrated circuit package substrate.