IP Library Granted Patent US 7,282,452
Granted Patent B2
US 7,282,452 · App. 10/679,464 · Granted Oct 16, 2007

Etching method, semiconductor and fabricating method for the same

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Quick Facts
Patent No.
US 7,282,452
App. No.
10/679,464
Granted
Oct 16, 2007
Kind
B2
Abstract

An organic/inorganic hybrid film represented by SiC x− H y O z (x>0, y≧0, z>0) is plasma-etched with an etching gas containing fluorine, carbon and nitrogen. During the etching, a carbon component is eliminated from the surface portion of the organic/inorganic hybrid film due to the existence of the nitrogen in the etching gas, to thereby reform the surface portion. The reformed surface portion is nicely plasma-etched with the etching gas containing fluorine and carbon.

Claims (27)

1. An etching method for plasma-etching an organic/inorganic hybrid film having low dielectric constant and represented by SiC x H y O z (x>0, y>0, z>0), comprising:

a first step of plasma-etching the organic/inorganic hybrid film with an etching gas containing fluorine, carbon and nitrogen,

a second step of plasma-etching the organic/inorganic hybrid film with a nitrogen free etching gas containing fluorine and carbon after the first step,

wherein the carbon content in the organic/inorganic hybrid film is about more than 17% and no more than 37%.

2. The etching method of claim 1 , wherein the etching gas contains CO or CO 2 .

3. The etching method of claim 1 , wherein the plasma-etching step includes a sub-step of forming an opening in the organic/inorganic hybrid film by performing plasma etching using a resist pattern as a mask.

4. The etching method of claim 1 , wherein during the plasma-etching step, C x H y is changed into HCN or CN at the surface of the organic/inorganic hybrid film.

5. The etching method of claim 1 , wherein the organic/inorganic hybrid film includes a methyl group.

6. A fabricating method for a semiconductor device, comprising the steps of:

depositing an interlayer insulating film on an interconnection layer formed on a substrate, the interlayer insulating film being composed of an organic/inorganic hybrid film having low dielectric constant and represented by SiC x H y O z (x>0, y>0, z>0);

forming a resist pattern having an opening on the interlayer insulating film,

performing a first plasma etching on the organic/inorganic film with an etching gas containing fluorine, carbon and nitrogen and using the resist pattern as a mask, thereby forming a contact hole or an interconnection groove in the interlayer insulating film; and

performing a second plasma etching on the organic/inorganic hybrid film with a nitrogen free etching gas containing fluorine and carbon after the first plasma etching,

wherein the carbon content in the organic/inorganic hybrid film is about more than 17% and no more than 37%.

7. The fabricating method for a semiconductor device of claim 6 , wherein during the plasma-etching step, C x H y is changed into HCN or CN at the surface of the organic/inorganic hybrid film.

8. The fabricating method for a semiconductor device of claim 6 , wherein the organic/inorganic hybrid film includes a methyl group.

9. A fabricating method for a semiconductor device, comprising the steps of:

depositing an interlayer insulating film on an interconnection layer formed on a substrate, the interlayer insulating film being composed of an organic/inorganic hybrid film having low dielectric constant and represented by SiC x H y O z (x>0, y>0, z>0);

forming a resist pattern having an opening on the interlayer insulating film;

performing a plasma etching on the interlayer insulating film with an etching gas containing fluorine, carbon and nitrogen and using the resist pattern as a mask, thereby forming a contact hole or an interconnection groove in the interlayer insulating film; and

performing a second plasma etching on the interlayer insulating film with a nitrogen free etching gas containing fluorine and carbon after the first plasma etching,

wherein the carbon content in the organic/inorganic hybrid film is about more than 17% and no more than 37%.

10. The fabricating method for a semiconductor device of claim 9 , wherein C x H y is changed into HCN or CN at the surface of the organic/inorganic hybrid film.

11. The fabricating method for a semiconductor device of claim 9 , wherein the organic/inorganic hybrid film includes a methyl group.

12. An etching method for plasma-etching an organic/inorganic hybrid film represented by SiC x H y O z (x>0, y>0, z>0), comprising:

a first step of plasma-etching the film with an etching gas containing fluorine, carbon and nitrogen, and

a second step of plasma-etching the film with a nitrogen free etching gas containing fluorine and carbon after the first step.

Assignments (7)
RELEASE OF SECURITY INTEREST Recorded Oct 26, 2020
From: JEFFERIES FINANCE LLC
To: RPX CORPORATION
Reel/Frame 054486/0422 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 7, 2020
From: RPX CORPORATION
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 051842/0494 →
RELEASE OF LIEN ON PATENTS Recorded Oct 21, 2019
From: JEFFERIES FINANCE LLC, AS COLLATERAL AGENT
To: RPX CORPORATION
Reel/Frame 050777/0983 →
SECURITY INTEREST Recorded Jun 29, 2018
From: RPX CORPORATION
To: JEFFERIES FINANCE LLC
Reel/Frame 046486/0433 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 8, 2014
From: PANASONIC CORPORATION
To: RPX CORPORATION
Reel/Frame 031939/0247 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 5, 2013
From: KANEGAE, KENSHI; IMAI, SHINICHI; NAKAGAWA, HIDEO
To: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
Reel/Frame 031549/0907 →
CHANGE OF NAME Recorded Nov 5, 2013
From: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
To: PANASONIC CORPORATION
Reel/Frame 031583/0287 →