Method to selectively increase the top resistance of the lower programming electrode in a phase-change memory cell and structures obtained thereby
View Patent ↗The present invention relates to a process of forming a phase-change memory. A lower electrode is disposed in a first dielectric film. The lower electrode comprises an upper section and a lower section. The upper section extends beyond the first dielectric film. Resistivity in the upper section is higher than in the lower section. A second dielectric film is disposed over the first dielectric film and has an upper surface that is coplanar with the upper section at an upper surface.
1. A phase-change memory cell comprising:
phase-change memory cell substrate including a lower electrode in a first dielectric film, wherein the lower electrode comprises an upper section and a lower section;
wherein the upper section forms a prominence that extends above the first dielectric film; and
wherein the upper section has a greater resistivity than the lower section.
2. The phase-change memory cell according to claim 1 , further comprising:
a second dielectric film disposed against the upper section, wherein the second dielectric film to exposes an upper surface of the upper section.
3. The phase-change memory cell according to claim 1 , further comprising:
a second dielectric film disposed against the upper section, wherein the second dielectric film to exposes an upper surface of the upper section, wherein the second dielectric film has a blanket configuration.
4. The phase-change memory cell according to claim 1 , wherein the upper section has a dielectric husk disposed thereon.
5. The phase-change memory cell according to claim 1 , wherein the upper section forms at least a conductivity gradient taken from a lateral surface of the upper section and tending toward a symmetry line thereof.
6. The phase-change memory cell according to claim 1 , wherein the upper section has a faceted configuration.
7. The phase-change memory cell according to claim 1 , wherein the lower electrode further comprises:
forming a metal compound film disposed in a recess.
8. The phase-change memory cell according to claim 1 , wherein the lower electrode further comprises:
a refractory metal compound film disposed in a recess.
9. The phase-change memory cell according to claim 1 , wherein the lower electrode further comprises:
a refractory metal compound film in a recess, wherein the refractory metal compound film is selected from tantalum nitride, titanium nitride, tungsten nitride, tantalum silicon nitride, titanium silicon nitride, and tungsten silicon nitride.
10. The phase-change memory cell according to claim 1 , wherein the lower electrode further comprises:
a polysilicon film disposed in a recess.
11. The phase-change memory cell according to claim 1 , further comprising:
a phase-change material disposed over the upper section.
12. An apparatus comprising:
a dedicated memory chip including a plurality of first address lines and a plurality of second address lines, a plurality of programmable elements electrically coupled to respective ones of the plurality of first address lines and the plurality of second address lines and a plurality of electrodes respective ones of which are coupled between respective ones of the plurality of programmable elements and respective ones of one of the plurality of first address lines and the plurality of second address lines, each of the plurality of electrodes comprising an upper section and a lower section, and addressing circuitry coupled to the plurality of first address lines and second address lines,
wherein the upper section of each of the plurality of electrodes forms a prominence that extends above a first dielectric film, and
wherein the upper section of each of the plurality of electrodes has a greater resistivity than the lower section.
13. The apparatus according to claim 12 , wherein the first dielectric film is disposed against the lower section of each of the plurality of electrodes and the dedicated memory chip further including a second dielectric film disposed against the upper section of each of the plurality of electrodes.
14. The apparatus according to claim 12 , wherein each of the plurality of electrodes further comprises a conductive material with the upper section having a dielectric husk disposed thereon.
15. The apparatus according to claim 12 , wherein the upper section of each of the plurality of electrodes forms at least a conductivity gradient taken from a lateral surface of the upper section and tending toward a symmetry line thereof.
16. The apparatus according to claim 12 , wherein the upper section of each of the plurality of electrodes has a faceted configuration.
17. The apparatus according to claim 12 , wherein each of the plurality of electrodes further comprises a material selected from a group consisting of a tantalum nitride, titanium nitride, tungsten nitride, tantalum silicon nitride, titanium silicon nitride, and tungsten silicon nitride.
18. The apparatus according to claim 12 , wherein each of the plurality of electrodes comprises polycrystalline silicon.